Nvidia Corporation

Ignatius B Tjandrasuwita

Iole Moccagatta

Harikrishna Madadi Reddy

Atul Garg

Shang-Hung Lin

Shankar Moni

Prahlad Venkatapuram

Hu He

Manindra Parhy

Dipankar Talukdar

Sandeep Shyamsukha

Brian Keith Cabral

Christopher L Mills

Hideo Ohira

Lefan Zhong

Derek E Pappas

Matthew Raymond Longnecker

Visalakshi Vaduganathan

Shang Hung Lin

Thomas Karpati

Yiu Cheong Ho

Jackson Lee

Karunakar Rachamreddy

Chung-Cheng Lou

A method for rotating macro-blocks of a frame of a video stream. A degree of rotation for the video stream is accessed. A macro-block of the video stream is accessed. The macro-block is rotated according to the degree of rotation. The macro-block is repositioned to a new position within the frame, wherein the new position is based on the degree of rotation.

Method for rotating macro-blocks of a frame of a video stream

A video decoder architecture for processing out-of-order macro-blocks of a video stream. A microcode engine receives compressed data representing macro-blocks of a frame of a video stream, wherein at least one macro-block is received out-of-order. The microcode engine is for buffering the compressed data and for ordering the macro-blocks of the frame in raster scan order. A digital video decoder receives the macro-blocks in raster scan order and is for decoding the macro-blocks.

Video decoder architecture for processing out-of-order macro-blocks of a video stream

A hardware multi-stream multi-standard video decoder device. A command parser accesses a plurality of video streams, identifies a video encoding standard used for encoding video streams of the plurality of video streams, and interleaves portions of the plurality of video streams. A plurality of hardware decoding blocks perform operations associated with decoding the plurality of video streams, wherein different subsets of the plurality of hardware decoding blocks are for decoding video streams encoded using different video encoding standards, such that interleaved video streams are decoded by activating subsets of the plurality of hardware decoding blocks for use in decoding the plurality of video streams. A plurality of register sets store parameters associated with the plurality of video streams.

Hardware multi-stream multi-standard video decoder device

A hardware multi-standard video decoder device. A command parser accesses a video stream and identifies a video encoding standard used for encoding the video stream. A plurality of hardware decoding blocks perform operations associated with decoding the video stream, wherein different subsets of the plurality of hardware decoding blocks are for decoding video streams encoded using different video encoding standards.

Hardware multi-standard video decoder device

Methods and systems for reducing or eliminating distortion in an image are described. The approach generally involves determining the distortion introduced by a lens, and modifying a captured image to reduce that distortion. In one embodiment, the distortion information associated with a lens is determined. The distortion information is stored. A captured image taken by that lens is processed, with reference to the distortion information.

Image distortion correction

Non-encoded data for a macroblock of an image frame is accessed. A cost to intra-encode the macroblock is computed using at least a portion of the non-encoded data in place of reconstructed image data from another macroblock of the image frame. The cost can be compared against the cost to inter-encode the first macroblock in order to select how the first macroblock is to be encoded.

Selecting a macroblock encoding mode by using raw data to compute intra cost

A flicker band automated detection system and method are presented. In one embodiment an incidental motion mitigation exposure setting method includes receiving image input information; performing a motion mitigating flicker band automatic detection process; and implementing exposure settings based upon results of the motion mitigating flicker band automatic detection process. The auto flicker band detection process includes performing a motion mitigating process on an illumination intensity indication. Content impacts on an the motion mitigated illumination intensity indication are minimized. The motion mitigated illumination intensity indication is binarized. A correlation of the motion mitigated illumination intensity and a reference illumination intensity frequency is established.

Flicker band automated detection system and method

The following embodiments describe an approach for selecting an intra prediction mode for video encoding, such as occurs in the H.264 standard. One embodiment describes a method of selecting an optimum intra prediction mode. This method involves selecting a first intra prediction mode, which is used to determine a search order for a number of intra prediction modes. These intra prediction modes are then evaluated in order to identify the optimum intra prediction mode.

Intra prediction mode search scheme

A technique for reducing artifacts in a digital image, in accordance with one embodiment, includes receiving a stream of raw filter pixel data representing the image. The raw filter pixel data is interpolating to produce red, green-on-red row, green-on-blue row and blue pixel data for each pixel. An artifact in one or more given pixels is reduced as a function of a difference between the green-on-red row and green-on-blue row pixel data of each of the given pixels to generate adjusted interpolated pixel data.

Techniques for reducing color artifacts in digital images

Described are methods and systems for processing data. A motion estimator uses a block of an input frame of video data and a block of a reference frame of video data to generate motion vectors according to a first encoding scheme. A motion compensator produces half pel motion vectors from the motion vectors according to a second encoding scheme that is different from the first encoding scheme.

Adapting one type of encoder to another type of encoder

The present invention facilitates efficient and effective detection of pixel alteration. In one embodiment a pixel alteration analysis system includes a difference summing multiple engine component and a control component. The difference summing multiple engine component determines the sum of differences between pixel values in a plurality of pixels. The control component determines an indication of motion based upon said relationship of said pixels in said plurality of pixels. In one exemplary implementation, the difference in values corresponds to a relationship between values of pixels in a block of pixels at different frames. The number and configuration of pixels in a block partition can be flexibly changed.

Adaptive multiple engine image motion detection system and method

The present invention includes a method and system for encoding video data by accessing a picture to be encoded, wherein the picture comprises a plurality of macro-blocks. A plurality of programmable counters are associated with each macro-block to be encoded. A counter associated with a macro-block of the plurality of macro-blocks is accessed and a value of the counter is determined. The method further includes determining whether to encode the macro-block as an Intra or non-Intra based on the value of the counter. If the macro-block is encoded as Intra, its counter is reset. If the macro-block is encoded as non-Intra, its counter value is updated. The counter value may be reset with a random number. Counters can be programmed such that a region of interest is defined for updating associated macro-blocks with greater frequency.

Growing community of inventors

Atherton, CA, United States of America

Ignatius B Tjandrasuwita