Samsung Electronics Co., Ltd.

Samsung Israel Research Corporation

Iddo Naiss

Jun Jin Kong

Uri Beitler

Elona Erez

Noam Livne

Eyal Calvo

A method for storing data multi-level cell (MLC) memory includes receiving data to be stored. The received data is divided into units of x bits, where x is an integer greater than or equal to 3. Each of the units of x bits is stored over a span of y memory cells of the MLC memory. Here, y is an integer greater than or equal to 2. At least one bit of each of the x bits is stored only partially in a first memory cell of the span of y memory cells and the at least one bit is also stored, only partially, in a second memory cell of the span of y memory cells such that the at least one bit cannot be interpreted without reading both the first and second memory cell of the span of y memory cells.

Mapping bits to memory cells using sector spreading

A method for reducing an amount of time needed for a single iteration of arithmetic encoding and arithmetic decoding is provided. Rescaling and range are calculated in parallel, range being a High parameter bound of a symbol-interval&#x2014;a Low parameter bound of the symbol-interval+1. A new iHigh (iH) parameter and a new iLow (iL) parameter or a given/decoded symbol is found according to a cumulative frequency for an ith symbol. iH parameter and iL parameter rescaling is performed by shifting an amount of most significant bits of iH, iL in accordance with values of iH and iL. iRange is shifted to the left in accordance with a number of digits needed to represent iRange and a total number of bits reserved for iRange. A shifted iRange is divided by CF[N] and saved to Step_tmp while awaiting a result of H,L rescaling.

Method and apparatus for flash memory arithmetic encoding and decoding

A memory controller includes a joint source-channel encoder circuit and a joint source-channel decoder circuit. The joint source-channel encoder circuit source encodes received data independent of whether the received data is compressible data, performs error correction coding on the source encoded data, and stores the source encoded data in a memory device. The joint source-channel decoder circuit performs source decoding of the data read from the memory device between iterations of error correction coding of the read data, and outputs the read data to at least one of a buffer memory and a storage device interface. The joint source-channel decoder circuit performs the source decoding of the read data independent of whether the read data is compressed data.

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Ramat Gan, Israel

Iddo Naiss