Hitachi, Ltd.

Ichiro Somada

Takao Okazaki

Yoichiro Kobayashi

Shinya Kajiyama

Hiroyasu Yoshizawa

Yusuke Wachi

Kenta Mochiduki

Provided is an amplifier with a test oscillator for a high frequency characteristic monitor, which has small power loss in a normal operation state and secures good noise performance while it is possible to equip both a transmitter IC and a receiver IC with the amplifier. In a high frequency IC including an amplifier including an inductive load and a test oscillator arranged in a same chip, the test oscillator commonly uses the inductive load of the amplifier, the amplifier has a bias voltage terminal to switch an operation state into an active state/inactive state, and the oscillator has a bias voltage terminal to switch an operation state into an active state/inactive state. In a test operation mode, the amplifier is inactivated and the test oscillator is activated and in a normal operation mode, the amplifier is activated and the test oscillator is inactivated.

High frequency integrated circuit and device using same

A bias circuit includes a first p-n junction element supplied with a current by a first current source connected to a low-voltage side of the first p-n junction element and a base terminal of a second transistor, a second p-n junction element supplied with a current by a second current source, the second current source connected to a low-voltage side of the second p-n junction element and a base terminal of a first transistor, the first and second transistors connected at their emitter terminals to a third current source and receiving base voltages generated by the first and second p-n junction elements, respectively. The second transistor and the first transistor constitute a differential pair in which, at a collector terminal of the second transistor, a current having a temperature coefficient that is substantially twice the temperature coefficient of the current of the second current source is obtained.

Bias circuit

The present invention provides a disk storage system with a low error rate, which is suitable for reduction in size. The other end of the signal line, which is connected with a read head at one end, is connected with a head bias circuit to apply a sense current to the read head and a pair of first and second capacitance elements for allowing the read signal element formed by the read head to pass, a loop is provided for amplifying the read signal obtained through the first and second capacitance elements by supplying the read signal to an input terminal of a differential amplifying circuit and for converting the amplified signal into the current by transconductance and providing a positive feedback of the amplified signal to the input terminal of the differential amplifying circuit.

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Tokyo, Japan

Ichiro Somada