Kabushiki Kaisha Toshiba

Ichiro Nagashima

Naoyuki Kai

Masahide Ohhashi

A graphics plotting apparatus has a decision unit for determining whether or not a polygon is smaller than a predetermined size, for example, the size of a pixel on a display screen or the size of a pixel on a texture pattern according to data of the vertexes of the polygon, a divider for dividing the polygon into small polygons if the polygon is not smaller than the predetermined size, and a plotting unit for plotting pixels corresponding to the polygon if the polygon is smaller than the predetermined size. This apparatus is capable of plotting perspective three-dimensional graphics with smooth shading and texture mapping at a high speed in real time.

Graphics plotting apparatus and method

A texture address generator has a first register for storing an n-th cycle texture address, a second register for storing an increment for the n-th cycle texture address, a third register for storing a constant for updating contents in the second register, an adder for adding the texture address stored in the first register to the increment stored in the second register, for each cycle, and for updating contents of the first register with a result of the addition, for each cycle, and multiplier for multiplying the increment stored in the second register by the constant stored in the third register, for each cycle, and updating contents of the second register with a result of the multiplication, for each cycle.

Texture address generator, texture pattern generator, texture drawing

A multiport DRAM having a DRAM cell array; a sequential access memory (SAM) for inputting data of a specific length to the DRAM cell array and transmitting that data to an external device; a SAM address counter for counting the addresses of the data in the SAM; a serial port connected to the SAM for transmitting the data in the SAM to an external device; a data transfer address counter, the contents of which is cleared by inputting an external reset signal and is counted up by inputting an overflow signal which is output from the SAM address counter; and a data transfer controller for outputting a data transfer status signal which indicates that data transmission is in progress when data of a specific length in the DRAM cell array designated by the input of the overflow signal by the data transfer address counter is transmitted to the SAM.

Multiport DRAM

Coordinate values of control points of a given Bezier curve are stored in a register, the contents of the register are supplied to a determination circuit to determine whether a distance between adjacent control points can further be bisected into two parts. If bisecting processing can be performed, the contents of the register are supplied to a bisection circuit, the Bezier curve is subdivided into two parts to generate new Bezier curves, and control point data of one of the new Bezier curves is applied to a stack memory and that of the other new Bezier curve is sent to the register. The contents of the register are checked by the determination circuit each time the contents of the register are updated.

Growing community of inventors

Yokohama, Japan

Ichiro Nagashima