Casio Computer Co., Ltd.

Teramikros, Inc.

Tera Probe, Inc.

Cmk Corporation

Oki Electric Industry Co., Ltd.

Aoi Electronics Co., Ltd.

Ichiro Mihara

Takeshi Wakabayashi

Hiroyasu Jobetto

Osamu Okada

Shinji Wakisaka

Yutaka Aoki

Aiko Mizusawa

Katsumi Watanabe

Osamu Kuwabara

Yutaka Yoshino

Toshihiro Kido

Nobuyuki Kageyama

Daita Kohno

Jun Yoshizawa

Kunpei Kobayashi

Minoru Kumagai

Iwao Tahara

Hiroshi Takenaka

Masami Hiramoto

Yutaki Aoki

Shoichi Kotani

Ichiro Kouno

Aido Mizusawa

A semiconductor device includes a semiconductor substrate on which a structure portion is provided except a peripheral portion thereof, and has a laminated structure including low dielectric films and wiring lines, the low dielectric films having a relative dielectric constant of 3.0 or lower and a glass transition temperature of 400&#xb0; C. or higher. An insulating film is formed on the structure portion. A connection pad portion is arranged on the insulating film and connected to an uppermost wiring line of the laminated structure portion. A bump electrode is provided on the connection pad portion. A sealing film made of an organic resin is provided on a part of the insulating film which surrounds the bump electrode. Side surfaces of the laminated structure portion are covered with the insulating film and/or the sealing film.

Semiconductor device having low dielectric insulating film and manufacturing method of the same

A semiconductor device includes a semiconductor substrate, a plurality of wiring lines which are provided on one side of the semiconductor substrate and which have connection pad portions, and a plurality of columnar electrodes respectively provided on the connection pad portions of the wiring lines, each of the columnar electrodes including an outer peripheral surface and a top surface. An electromigration prevention film is provided on at least the surfaces of the wiring lines. A sealing film is provided around the outer periphery surfaces of the columnar electrodes.

Semiconductor device comprising electromigration prevention film and manufacturing method thereof

A semiconductor device includes a semiconductor substrate on which a structure portion is provided except a peripheral portion thereof, and has a laminated structure including low dielectric films and wiring lines, the low dielectric films having a relative dielectric constant of 3.0 or lower and a glass transition temperature of 400&#xb0; C. or higher. An insulating film is formed on the structure portion. A connection pad portion is arranged on the insulating film and connected to an uppermost wiring line of the laminated structure portion. A bump electrode is provided on the connection pad portion. A sealing film made of an organic resin is provided on a part of the insulating film which surrounds the pump electrode. Side surfaces of the laminated structure portion are covered with the insulating film and/or the sealing film.

A photosensor comprises a photoelectric conversion device region and a connection pad on the lower surface of a semiconductor substrate, and also comprises a wiring line connected to the connection pad via insulating film under the semiconductor substrate, and a columnar electrode as an external connection electrode connected to the wiring line. As a result, as compared with the case where the photoelectric conversion device region and the connection pad connected to the photoelectric conversion device region are formed on the upper surface of the semiconductor substrate, a piercing electrode for connecting the connection pad and the wiring line does not have to be formed in the semiconductor substrate. Thus, the number of steps can be smaller, and a fabrication process can be less restricted.

Imaging apparatus having a photosensor provided on a lower surface of a semiconductor substrate and a lens unit provided on an upper surface of the semiconductor substrate, and manufacturing method of the same

A semiconductor device includes a plurality of semiconductor constructs, each of the semiconductor constructs including a semiconductor substrate and external connection electrodes provided on an upper surface of the semiconductor substrate. The semiconductor substrates of the semiconductor constructs are different in a planar-size. The plurality of semiconductor constructs are stacked from bottom to top in descending order of planar-sizes of the semiconductor substrates included in the plurality of semiconductor constructs. An insulating film at least is provided around one semiconductor construct disposed on the top of the plurality of semiconductor constructs and on another semiconductor construct disposed under the one semiconductor construct. Each of the upper surfaces of the plurality of external connection electrodes is exposed from the one semiconductor construct and from the insulating film.

Semiconductor device having a plurality of semiconductor constructs

Disclosed is a semiconductor device comprising: a semiconductor substrate in which an integrated circuit is formed; a first resin film provided over the semiconductor substrate; a second resin film provided over an upper surface of the first resin film except at least a peripheral portion of the first resin film; and a thin film inductor provided over the second resin film.

Semiconductor device and manufacturing method thereof

A first semiconductor element is mounted on a base plate, and is in a sealed state by the periphery thereof being covered by an insulation member, and the upper surface thereof being covered by an upper insulation film. An upper wiring layer formed on the upper insulation film, and the lower wiring layer formed below the base plate via lower insulation films are connected by conductors. A second semiconductor element is mounted exposed, being connected to the lower wiring layer.

Semiconductor device including semiconductor element surrounded by an insulating member and wiring structures on upper and lower surfaces of the semiconductor element and insulating member, and manufacturing method thereof

In this manufacturing method of a semiconductor device, a metal plate having a plurality of projection electrodes in each of a plurality of semiconductor device formation areas is prepared. Next, the projection electrodes of each of the semiconductor formation areas are aligned corresponding to external connection electrodes of each semiconductor construction, and each semiconductor construction is separately arranged on the projection electrodes in the semiconductor device formation areas. Next, an insulating layer formation sheet is arranged on the metal plate, and the metal plate and the insulating layer formation sheet are joined by heat pressing. Then, the metal plate is patterned and a plurality of upper layer wirings that connect to the projection electrodes is formed.

Method of forming wiring on a plurality of semiconductor devices from a single metal plate, and a semiconductor construction assembly formed by the method

A semiconductor device includes a semiconductor substrate having an integrated circuit and at least one connection pad, and at least one external connection electrode electrically connected with the connection pad. A first sealing material is provided on the semiconductor substrate around the external connection electrode, each impurity concentration of an Na ion, a K ion, a Ca ion and Cl ion contained in the first sealing material being not greater than 10 ppm. A second sealing material is provided on at least one of a lower surface and a peripheral side surface of the semiconductor substrate, a total impurity concentration of an Na ion, a K ion, a Ca ion and a Cl ion contained in the second sealing material being not smaller than 100 ppm.

Semiconductor device packaged into chip size and manufacturing method thereof

In a semiconductor device, re-wiring is provided on a circuit element formation region of a semiconductor substrate. A columnar electrode for connection with a circuit board is provided on the rewiring. A first insulating film is provided over the semiconductor substrate excluding a connection pad, and a ground potential layer connected to a ground potential is provided on an upper surface of the first insulating film. A re-wiring is provided over the ground potential layer with a second insulating film interposed. The ground potential layer serves as a barrier layer for preventing crosstalk between the re-wiring and circuit element formation region. A thin-film circuit element is provided on the second insulating film, and a second ground potential layer is provided as a second barrier layer over the thin-film circuit element with an insulating film interposed. Re-wiring is provided over the second ground potential layer.

Semiconductor device having a thin-film circuit element provided above an integrated circuit

A semiconductor device includes a semiconductor construction assembly having a semiconductor substrate which has first and second surfaces, and has an integrated circuit element formed on the first surface, a plurality of connection pads which are connected to the integrated circuit element, a protective layer which covers the semiconductor substrate and has openings for exposing the connection pads, and conductors which are connected to the connection pads, arranged on the protective layer, and have pads. An upper insulating layer covers the entire upper surface of the semiconductor construction assembly including the conductors except the pads. A sealing member covers at least one side surface of the semiconductor construction assembly. An upper conductors is formed on the upper insulating layer, and has one ends electrically connected to the pads and an external connection pads, respectively, an external connection pad of at least one of the upper conductors being disposed in a region corresponding to the sealing member.

Semiconductor device and method of manufacturing the same

A semiconductor device includes a semiconductor substrate having an integrated circuit, a first insulating film formed on the semiconductor substrate, at least one power source internal wiring line formed on the first insulating film, and a second insulating film formed on the first insulating film and on the internal wiring line and having a plurality of openings exposing parts of the internal wiring line. At least one wiring line is formed on an upper side of the second insulating film to correspond to the internal wiring line and electrically connected to the internal wiring line via the plurality of openings of the second insulating film. The wiring line has at least one external electrode pad portion whose number is smaller than the number of openings in the second insulating film.

Semiconductor device having reduced number of external pad portions

Semiconductor device including semiconductor element surrounded by an insulating member wiring structures on upper and lower surfaces of the semiconductor element and insulating member, and manufacturing method thereof

Growing community of inventors

Tachikawa, Japan

Ichiro Mihara