Hitachi, Ltd.

Kokusai Electric Co., Ltd.

Hitachi-Kokusai Electric Inc.

Ichiro Imaizumi

Masatoshi Kimura

Tetsuhiko Miyatani

Keijiro Uehara

Kouya Hoshina

Susumu Takahashi

Tohru Nakamura

Shunji Abe

Takashi Yamaguchi

Minoru Nagata

Masao Kawamura

Takahiro Okabe

Kenzo Urabe

Masayoshi Yoshimura

Takao Miyazaki

Shikayuki Ochi

Kenjiro Yasunari

Toyomasa Koda

Hitoshi Kato

Osamu Sato

Jun Watanabe

Hiroki Yamashita

Hiroyuki Itoh

Hisashi Kawai

Hirotoshi Tanaka

Kenji Nagai

Teruichi Tomura

Akio Hayasaka

Tadao Kaji

Mineo Katsueda

Hiroyuki Iyama

Atsumi Kawata

Mitsuo Akatsuka

Kazuhiro Yoshihara

Toshiaki Okada

Takahiro Todate

The present invention provides an RACH receiving apparatus in which the components can be constructed in a small scale. The RACH receiving apparatus performs a demodulation processing so as to divide it into two stages of a first demodulation processing for multiplying reception data of complex-modulated RACH by sign codes subjected to an arithmetic processing with long codes and phase rotations in a code register multiplying unit, and a second demodulation processing for adding multiplication results every chips and multiplying addition results by signature codes in a signature multiplying unit.

Rach receiving apparatus

There is disclosed a correlation circuit for spread spectrum communication, which can demodulate users having superposed demodulation phases and equaling or exceeding a sum of products calculation processing ability without enlarging a constitution. When a plurality of users more than a specified number exist in the same phase of the input signal from a memory, a controller controls a transfer speed of a shift of one sample in an input signal register in order to hold a sufficient time for completing calculation of a sum of products with all the plurality of users in a sum of products calculator in the correlation circuit for spread spectrum communication.

Correlation circuit for spread spectrum communication

There is disclosed a synchronous circuit and a receiver in which a long code for use in communication can be determined in a short time, and circuit scale can be reduced. Upon receiving input of a data stop signal from a control unit, a matched filter continues to hold the signal held at the time, performs a product sum operation of a spreading code successively inputted from a spreading code generator and the held signal, and successively outputs correlation signals in the synchronous circuit and the receiver.

Synchronous circuit and receiver

There is disclosed a correlation circuit for spread spectrum communication which reduces the number of constituting elements to attain low power consumption and which can obtain correlation in a short time, to solve a problem that a conventional sliding correlator requires much time to obtain the correlation and that a matched filter increases the power consumption. In the spread spectrum communication correlation circuit, an A/D converter converts a received spread spectrum signal to a digital signal. Under control of a controller, one symbol of signals are written to an S/H circuit with a 16 MHz. clock, shifted for each sample and read to a high-speed correlator from the S/H circuit with a high-speed clock of 1.6 GHz a plurality of times, and the high-speed correlator performs a product sum operation with a spread code with the 1.6 GHz clock. At the same time the reading is performed, the next symbol of signals are written to the S/H circuit.

In a conventional correlation circuit for spread spectrum communication, when a sliding correlator is used, much time is required. When a matched filter is used, a problem is that a circuit scale and power consumption are increased. In the present invention, however, there is provided a correlation circuit for spread spectrum communication which minimizes the number of constituting elements, and can reduce the power consumption. In the correlation circuit for spread spectrum communication of the present invention, a spread spectrum received signal is A/D converted and accumulated in a data memory unit by a symbol unit, data rate is converted, and a high-rate MF performs a product sum operation processing at a high rate so that a correlation output is obtained.

Correlation circuit for spread spectrum communication, demodulation circuit and reception apparatus

A despreading circuit which can reduce a circuit scale and power consumption is described. The circuit includes an A/D converter which converts a CDMA modulated analog signal to a digital signal of N bits, and a searcher which defects a synchronization phase from high-order small bits of the N bits and outputs synchronozation phase information to a control circuit. The control circuit transmits a signal for allowing despreading to be performed to a sliding correlator based on the phase information. The sliding correlator despreads the N bit digital signal outputted by the A/D converter and outputs the resulting correlation output as a despreading signal.

Despreading circuit

A despreading circuit which can reduce a circuit scale and power consumption is described. The circuit includes an A/D converter which converts a CDMA modulated analog signal to a digital signal of N bits, and a searcher which detects a synchronization phase from high-order small bits of the N bits and outputs synchronization phase information to a control circuit. The control circuit transmits a signal for allowing despreading to be performed to a sliding correlator based on the phase information. The sliding correlator despreads the N bit digital signal outputted by the A/D converter and outputs the resulting correlation output as a despreading signal.

A flip-flop circuit receives a pair of complementary data signals, then outputs complementary signals corresponding to the pair of complementary data signals. The pair of data signals are also supplied to a driving gate means which outputs a signal corresponding to at least one data signal of the pair of data signals supplied thereto. The driving gate means also comprises at least one try-state gate controlled by a clock signal. An output signal of the driving gate means is held by a memory means, and also outputted as complementary output signals.

Flip-flop circuit

Disclosed is a process for making a bipolar transistor which comprises an n-type Si semiconductor body having a convex portion, an insulation film covering the surface of the semiconductor body other than the convex portion, and a p-type polycrystalline Si layer formed on the insulation film. A p-type region formed in the convex portion serves as an intrinsic base region, the polycrystalline Si layer serves as an extrinic base region, an n-type region formed in the intrinsic base region serves as an emitter region, and the body serves as a collector region.

Process for making polysilicon contacts to IC mesas

A bipolar transistor comprises an n-type Si semiconductor body having a convex portion, an insulation film covering the surface of the semiconductor body other than the convex portion, and a p-type polycrystalline Si layer formed on the insulation film. A p-type region formed in the convex portion serves as an intrinsic base region, the polycrystalline Si layer serves as an extrinsic base region, an n-type region formed in the intrinsic base region serves as an emitter region, and the body serves as a collector region.

Polysilon contacts to IC mesas

A high-breakdown-voltage semiconductor device wherein a resistor body made of a P-type impurity region is disposed in a surface region of an N-type semiconductor body so as to form a resistor element, a P-type low doped region is disposed around the resistor body, and a plate layer which extends from a high potential electrode of the resistor body covers a main part of the P-type low doped region.

High-breakdown-voltage semiconductor device

A high-breakdown-voltage resistance element comprises a semiconductor body, an impurity layer disposed in a surface region of the semiconductor body to provide a resistor body, a first electrode connected to one end of the resistor body through a contact hole in a first insulating film formed on the surface of the semiconductor body, and a second electrode connected to the other end of the resistor body through another contact hole in the insulating film. A second insulating film is formed on the first and second electrodes, and a third electrode is connected to the first electrode through a contact hole in the second insulating film, so that the entire surface of the resistor body and adjacent areas are covered with the first, second and third electrodes.

High-breakdown-voltage resistance element for integrated circuit with a

A semiconductor device prepared by forming a silicon substrate of one conductor type having a surface of the (100) crystal plane, opening a rectangular window having sides parallel to the &lt;100&gt; crystal axis, etching the interior of the rectangular window with an anisotropic etching solution to form a dent, removing the oxide film and growing an epitaxial layer of a conductor type opposite to that of the substrate on the entire surface of the substrate, and masking the dent with an oxide film and etching the epitaxial layer with an anisotropic etching solution to flatten the surface of the epitaxial layer, and a method for making this semiconductor device.

Method for making semiconductor device

Junction isolated IC with thick EPI portion having sides at least 20

A lateral transistor or the like is made by the steps of forming a first insulating layer on a semiconductor substrate and providing a first hole in this insulating layer so as to expose a first surface portion of the substrate. An impurity of a first conductivity type is introduced through the hole and a second hole is formed in the insulating layer so as to expose a second surface portion of the substrate spaced apart from the first portion. Then, a second insulating layer of a material different from that of the first layer is formed on the first insulating layer and on the first and second surface portions of the substrate. Subsequently, third and fourth holes are formed in the second insulating layer within the confines of these holes to expose at least portions of the first and second surface portions of the substrate. Then, an impurity of a second conductivity type is introduced into the exposed first and second surface portions of the substrate through the third and fourth holes.

Growing community of inventors

Tokyo, Japan

Ichiro Imaizumi