Asahi Kasei Microsystems Co., Ltd.

Oasis Design, Inc.

Asahi Corporation

Asahi Kasei Microsystems Ltd.

Ichiro Fujimori

A D/A converter for converting a given digital signal into an analog signal includes a plurality of capacitors (C1, C2 . . . , Ci) for storing an electric charge corresponding to a predetermined reference voltage (Vr+or Vr-). The reference voltage is selected depending on the digital signal during a period when a clock .phi.1 is at a high level. A switch selection (SUG1-SUGi, SB) is used to connect each of the plurality of capacitors between an input terminal and an output terminal of an operational amplifier 100 during a period when a clock +2 is at a high level.

D/A converter and delta-sigma D/A converter

An integrated circuit is provided for sourcing a mirrored current into a high impedance output node. A load may be coupled to the output node, and the mirrored current may be derived proportional to or substantially equal to current forwarded from a reference current source. The integrated circuit, or current mirror, includes a pair of series-connected output transistors coupled between the output node and a reference terminal. One of the output transistors is dimensioned with a channel that is short enough to ensure the threshold voltage of that transistor is smaller than the threshold voltage of the other transistor having a longer channel. Thus, one transistor utilizes the benefits of high density integrated circuit manufacture and, more specifically, short channel effects arising from channel length less than, e.g., 1.0 microns. The difference in threshold voltages between the pair of output transistors, and mutually connecting gates of those transistors helps maximize the output impedance and voltage swing from the output node of the current mirror while minimizing voltage needed to operate the current mirror.

Low voltage self cascode current mirror

A D/A switched capacitor circuit, employed as part of a delta-sigma modulator, is provided. The modulator forms part of an A/D converter system, and the switched capacitor circuit is controlled by careful selection of clock phases. The clock phases, or more specifically four clock phases, are provided to ground both plates of switched capacitors within the D/A circuit subsequent to their discharge upon the integrator and prior to the next sampling period. Full discharge of shared capacitors to a ground voltage substantially eliminates any data dependent loading of integrator offset voltages upon the reference voltage supplies. Substantial reduction or elimination of data-dependent values prevents ac modulation of the referenced voltage supply and the imputed noise associated therewith.

Apparatus and method for switching capacitors within a switched

A modulator, in conjunction with a load circuit, is provided. The modulator forms part of an A/D converter system. The modulator includes a series of switched capacitors connected in a shared capacitor arrangement. The shared capacitors receive samples from an input signal and, depending upon the logic value fed into a D/A converter, the shared capacitor further receives a feedback reference voltage. The reference voltage is thereby coupled to the switched capacitor network, as well as to a load circuit which cancels data-dependent values modulated upon the reference voltage supply. The load circuit thereby serves to eliminate ac components within the reference voltage supply resulting from data dependent loading.

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Kanagawa, Japan

Ichiro Fujimori