Macronix International Co., Ltd.

Ichen Yang

Mu-Yi Liu

Chia-Lun Hsu

Kuan-Po Chen

Tao-Cheng Lu

Tao-Cheng Liu

An LDMOS device and method of fabrication are provided. The LDMOS device has a substrate with a source region and a drain region formed in the substrate. An insulating layer is provided on a portion of the substrate between the source and the drain region, such that a planar interface is provided between the insulating layer and a surface of the substrate. An insulating member is then formed on a portion of the insulating layer, and a gate layer is formed over part of the insulating member and the insulating layer. By employing such a structure, it has been found that a flat current path exists which enables the on-resistance to be decreased while maintaining a high breakdown voltage.

LDMOS device with multiple gate insulating members

An LDMOS device and method of fabrication are provided. The LDMOS device has a substrate with a source region and a drain region formed in the substrate. An insulating layer is provided on a portion of the substrate between the source and the drain region, such that a planar interface is provided between the insulating layer and a surface of the substrate. An insulating member is then formed on a portion of the insulating layer, and a gate layer is formed over part of the insulating member and the insulating layer. By employing such a structure, it has been found that a flat current path exists which enables the on-resistance to be decreased whilst maintaining a high breakdown voltage.

LDMOS device and method of fabrication

A lateral double diffused metal oxide semiconductor (LDMOS) device, and method of fabricating such a device, are provided. The method comprises the steps of: (a) providing a substrate of a first conductivity type; (b) forming within the substrate a well region of a second conductivity type, the well region having a super steep retrograde (SSR) well profile in which a doping concentration changes with depth so as to provide a lighter doping concentration in a surface region of the well region than in a region below the surface region of the well region; (c) forming a gate layer which partly overlies the well region and is insulated from the well region; and (d) forming one of a source region and a drain region in the well region. The presence of the SSR well region provides a lighter surface doping to enable a higher breakdown voltage to be obtained within the LDMOS device, and heavier sub-surface doping to decrease the on-resistance.

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Changhua, Taiwan

Ichen Yang