Ciena Corporation

Ciene Corporation

Ian Woods

Kelvin Prosyk

David Alexander Macquistan

A device includes two or more waveguide portions that are adjacent to each other, and each of the two or more waveguide portions includes a first n-doped semiconductor structure and a p-doped semiconductor structure in contact with the first n-doped semiconductor structure at a bottom surface and two lateral walls on opposite ends of the first n-doped semiconductor structure. The device includes an undoped semiconductor structure in contact with each of the p-doped semiconductor structures and free of contact with each of the first n-doped semiconductor structures, and the undoped semiconductor structure includes an optical waveguide core embedded within the undoped semiconductor structure. The device includes a second n-doped semiconductor structure in contact with the undoped semiconductor structure and free of contact with each of the first n-doped semiconductor structures and the p-doped semiconductor structures.

Suppressing leakage currents in periodic travelling wave electrode structures

A photonic integrated circuit including a photonic device and a gain element, said gain element formed by a process including: depositing by epitaxy a first doped layer onto a substrate; depositing by epitaxy an active layer capable of optical gain onto the first doped layer; depositing by epitaxy a second doped layer onto the active layer; pattern etching at least the second doped layer and the active layer to form a first ridge; and depositing by epitaxy a current blocking layer laterally adjacent to the first ridge at least partially filling the volume of active layer that was removed by the pattern etching; wherein the current blocking layer forms a portion of the photonic device.

Monolithically integrated gain element

A method includes obtaining a Photonic Integrated Circuit (PIC) with a butt-joint between a first core and a second core, wherein the butt-joint includes a poor quality region, wherein the first core is associated with a first optical device and the second core is associated with a second optical device, and wherein the first optical device and the second optical device are each on the PIC; etching away at least part of the poor quality region to form an etch trench between the first core and the second core; and growing an interconnect core between the first core and the second core in the etch trench.

Growing community of inventors

Nepean, Canada

Ian Woods