Cadence Design Systems, Inc.

Ian Campbell Dennison

Donald John O'Riordan

Keith Dennison

Bogdan George Arsintescu

Ian Gebbie

Zsolt Haag

Mark Baker

A computer-implemented method of identifying sub-circuits in circuit designs includes: receiving a selection of a sub-circuit; specifying a match expression for the sub-circuit, where the match expression characterizes matching properties of components of the sub-circuit; modifying the match expression to change the matching properties of components of the sub-circuit; and producing an information structure in a computer readable medium, where the information structure associates a graph representing a topology of the selected sub-circuit with the modified match expression. Subsequently, the information structure corresponding to the selected sub-circuit can be identified in a given circuit design.

System and method enabling circuit topology recognition with auto-interactive constraint application and smart checking

A method, mechanism, and system for determining an effective resistance for a network of resistors, irrespective of the number of terminals is provided. An aspect of an approach relates to the reduction of any network of resistors to a single resistance value. Another aspect of an approach relates to the application of a power loss calculation to determine the effective resistance. Yet another aspect of an approach relates to the integration of the method/mechanism with an analog simulator.

Method and system for performing effective resistance calculation for a network of resistors

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Edinburgh, United Kingdom

Ian Campbell Dennison