United Microelectronics Corp.

Taiwan Semiconductor Manufacturing Comp. Ltd.

I-Hsiung Huang

Jiunn-Ren Hwang

Heng-Jen Lee

Chin-Hsiang Lin

Heng-Hsin Liu

Anseime Chen

Kuei-Chun Hung

Chien-Fu Lee

Ling-Chieh Lin

Ching-Hsu Chang

Chih-Chiang Tu

Chun-Jen Chen

Jui-Chun Peng

Yung-Cheng Chen

Tung-Li Wu

Chien-Wen Lai

Yeong-Song Yen

Rick Lai

Chieh-Ming Wang

Chih-Wei Lin

Chi-Yuan Shih

Sheng-Chi Chin

Chi-Lun Lu

Yao-Ching Ku

Vencent Chang

Chingfu Lin

Yi-Fang Cheng

Chien-Ming Wang

Ya-Hui Chang

Yu-Mei Liu

Jiunn-Ren Huang

Chi-Lin Lu

Feng-Yuan Chang

Anderson Chang

An extreme ultra violet (EUV) lithography apparatus includes a light source that generates an EUV light beam, a scanner that receives the light from a junction with the light source and directs the light to a reticle stage, and a debris catcher disposed on a EUV beam path between the light source and the scanner. The debris catcher includes a network membrane including a plurality of nano-fibers.

EUV lithography apparatus and operating method for mitigating contamination

Methods for removing haze defects from a photomask or reticle are disclosed. The photomask is placed into a chamber which includes a hydrogen atmosphere. The photomask is then exposed to radiation. The energy from the radiation, together with the hydrogen, causes decomposition of the haze defects. The methods can be practiced on-site and quickly, without the need for wet chemicals or the need to remove the pellicle before cleaning of the photomask. A device for conducting the methods is also disclosed herein.

Methods for cleaning lithography mask

The present disclosure provides for many different embodiments. An exemplary method can include providing a mask fabricated according to a design pattern; extracting a mask pattern from the mask; converting the mask pattern into a rendered mask pattern, wherein the simulated design pattern includes the design pattern and any defects in the mask; simulating a lithography process using the rendered mask pattern to create a virtual wafer pattern; and determining whether any defects in the mask are critical based on the virtual wafer pattern. The critical defects in the mask can be repaired.

Lithographic plane check for mask processing

A method including bonding a process wafer having integrated circuits and a carrier wafer having at least one alignment mark to form a wafer assembly. The method further includes aligning the wafer assembly using the at least one alignment mark of the carrier wafer.

Method of making wafer assembly

The present disclosure relates to a lithographic tool arrangement for semiconductor workpiece processing. The lithographic tool arrangement groups lithographic tools into clusters, and selectively transfers a semiconductor workpiece between a plurality of lithographic tools of a first type in a first cluster to a plurality of lithographic tools of a second type in a second cluster. The selective transfer is achieved though a transfer assembly, which is coupled to a defect scan tool that identifies defects generated in the lithographic tool of the first type. The disclosed lithographic tool arrangement also utilizes shared structural elements such as a housing assembly, and shared functional elements such as gases and chemicals. The lithographic tool arrangement may consist of baking, coating, exposure, and development units configured to provide a modularization of these various components in order to optimize throughput and efficiency for a given lithographic fabrication process.

Litho cluster and modulization to enhance productivity

A wafer assembly includes a process wafer and a carrier wafer. Integrated circuits are formed on the process wafer. The carrier wafer is bonded to the process wafer. The carrier wafer has at least one alignment mark.

Wafer assembly with carrier wafer

A method and system to improve scanner throughput is provided. An image from a reticle is projected onto a substrate using a continuous linear scanning procedure in which an entire column of die or cells of die is scanned continuously, i.e. without stepping to a different location. Each scan includes translating a substrate with respect to a fixed beam. While the substrate is translated, the reticle is also translated. When a first die or cell of die is projected onto the substrate, the reticle translates along a direction opposite the scan direction and as the scan continues along the same direction, the reticle then translates in the opposite direction of the substrate thereby forming an inverted pattern on the next die or cell. The time associated with exposing the substrate is minimized as the stepping operation only occurs after a complete column of cells is scanned.

Enhanced scanner throughput system and method

A method and system for fabricating a substrate is disclosed. First, a plurality of process chambers are provided, at least one of the plurality of process chambers adapted to receive at least one plasma filtering plate and at least one of the plurality of process chambers containing a plasma filtering plate library. A plasma filtering plate is selected and removed from the plasma filtering plate library. Then, the plasma filtering plate is inserted into at least one of the plurality of process chambers adapted to receive at least one plasma filtering plate. Subsequently, an etching process is performed in the substrate.

Method to improve mask critical dimension uniformity (CDU)

The present disclosure provides for many different embodiments. An exemplary method can include providing a blank mask and a design layout to be patterned on the blank mask, the design layout including a critical area; inspecting the blank mask for defects and generating a defect distribution map associated with the blank mask; mapping the defect distribution map to the design layout; performing a mask making process; and performing a mask defect repair process based on the mapping.

Cost-effective method for extreme ultraviolet (EUV) mask production

A method comprises providing a semiconductor substrate having a first layer and a second layer above the first layer. The first layer haw a plurality of first patterns, vias or contacts. The second layer has second patterns corresponding to the first patterns, vias or contacts. The second patterns have a plurality of in-plane offsets relative to the corresponding first patterns, vias or contacts. A scanning electron microscope is used to measure line edge roughness (LER) values of the second patterns. An overlay error is calculated between the first and second layers based on the measured LER values.

Overlay alignment mark and method of detecting overlay alignment error using the mark

A dual wavelength exposure system provides for patterning a resist layer formed on a wafer for forming semiconductor devices, using two exposure operations, one including a first radiation having a first wavelength and the other including a second radiation including a second wavelength. Different or the same lithography tool may be used to generate the first and second radiation. For each die formed on the semiconductor device, a critical portion of the pattern is exposed using a first exposure operation that uses a first radiation with a first wavelength and a non-critical portion of the pattern is exposed using a second exposure operation utilizing the second radiation at a second wavelength. The resist material is chosen to be sensitive to both the first radiation having a first wavelength and the second radiation having the second wavelength.

Dual wavelength exposure method and system for semiconductor device manufacturing

A method of manufacturing a photomask is described. The graphic data of the photomask are provided, and than an optical proximity correction is performed to the graphic data. A process rule check is then performed to the graphic data with the optical proximity correction. When at least one failed pattern not passing the process rule check is found in the graphic data, a repair procedure is performed only to the failed pattern so that the failed pattern can pass the process rule check. The patterns of the photomask are then formed according to the corrected and repaired graphic data.

Method of manufacturing photomask and method of repairing optical proximity correction

An apparatus includes a radiation source that emits a radiation beam that causes substantially all of a quantity of material to evaporate; and structure having first and second surface portions, a first operational mode wherein a greater quantity of a byproduct of the evaporation impinges on the first surface portion, and a second operational mode wherein a greater quantity of the byproduct impinges on the second surface portion. A different aspect involves emitting a radiation beam toward a quantity of material, the radiation beam causing substantially all of the quantity of material to evaporate; operating a structure having first and second surface portions in a first operational mode wherein a greater quantity of a byproduct of the evaporation impinges on the first surface portion; and thereafter operating the structure in a second operational mode wherein a greater quantity of the byproduct impinges on the second surface portion.

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Kaohsiung, Taiwan

I-Hsiung Huang