Via Technologies, Inc.

I-Chou Chung

Chingwo Ma

ChinGwo Ma

Ping-Chieh Kao

A radio receiver has an ADC connected to an RF module. Baseband processing modules are connected to the ADC, and a power control module is connected to each of the baseband processing modules. Each of the baseband processing modules is capable of performing detection, demodulation, time and frequency synchronization, decoding, and de-scrambling of signals of a respective modulation format among numerous modulation formats. At least one of the baseband processing modules also has a rate converter connected to the ADC for converting a data rate of signals output from the ADC to a data rate of the corresponding modulation format of that baseband processing module. The power control module is connected to the baseband processing modules and controls power to the baseband processing modules according to signals received from the baseband processing modules.

Radio receiver supporting multiple modulation formats with a single pair of ADCs

An apparatus for estimating frequency offset of a demodulator is disclosed. An input symbol is regarded as a rotating phasor obtained by consecutive sampling symbols, while the phasor encompasses an argument containing phase rotated by frequency offset and phase difference by modulation polarity. An adaptive judgment circuit encompassing a decision feedback way is employed to de-polarize the phasor, i.e. to move out the argument of modulation. The adaptive judgment circuit includes a decision circuit and a multiplier. The decision circuit of the adaptive judgment circuit receives the phasor fed from the phase-increment extraction circuit to find a de-noise phasor by using the product of the phasor and a de-noise symbol, wherein the de-noise symbol is determined according to an inner product of the phasor and a last summation stored in a summation circuit. In the multiplier, the de-polarized phasor is obtained by multiplying the phasor by the de-noise symbol before feeding into the next stage, summation circuit. A summation circuit is used for estimating de-polarize phasor by a summation of the de-polarized phasors, while the summation is fed back to the decision circuit for deriving the inner product of the next input symbol. An argument circuit finally extracts the phase offset of the summation containing the frequency offset.

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Taipei Hsien, Taiwan

I-Chou Chung