Macronix International Co., Ltd.

I Chen Yang

Yao Wen Chang

Tao Cheng Lu

Hui Chih Lin

Guan Wei Wu

Po Chou Chen

A semiconductor structure has a MOSFET and a substrate to accommodate the MOSFET. The MOSFET has a gate, a source, and a drain in the substrate. A first substrate region surrounding the MOSFET is doped with a stress enhancer, wherein the stress enhancer is configured to generate a tensile stress in the MOSFET's channel and the tensile stress is along the channel's widthwise direction.

Semiconductor structure

A method is described for enlarging a programming window of charge trapping memory cells in a virtual ground charge trapping memory EEPROM array. The method substantially eliminates second bit effects and program disturbances to nearby charge trapping memory cells.

Growing community of inventors

Changhua County, Taiwan

I Chen Yang