Samsung Display Co., Ltd.

Hyunyoung Choi

Cholho Kim

Jihoon Yang

Gunwoo Yang

Yongwoo Lee

Keumdong Jung

Jiyoung Lee

Donghyun Lee

Seongyoung Lee

Daecheol Kim

Hagyeong Song

Hyung Uk Cho

Sang-gu Lee

Myeongeon Kim

Hyeondo Park

Sohae Kim

Wonhyouk Jang

Woogun Kang

Jisong Chae

A pixel circuit includes a first transistor including a control electrode connected to a second node, a first electrode receiving a first power supply voltage, and a second electrode connected to a third node, a second transistor including a control electrode receiving a write signal, a first electrode connected to a data line, and a second electrode connected to a first node, a third transistor including a control electrode receiving a compensation signal, a first electrode connected to the second node, and a second electrode connected to the third node, a fourth transistor including a control electrode receiving an initialization signal, a first electrode receiving an initialization voltage, and a second electrode connected to a fourth node, a fifth transistor including a control electrode connected to the first node, a first electrode connected to the third node, and a second electrode connected to the fourth node, and a light emit element including a first electrode connected to the fourth node.

Pixel circuit and display apparatus having the same

A pixel circuit includes a driving transistor, a first capacitor including a first electrode and a second electrode, a write transistor that writes a data voltage to a control electrode of the driving transistor in response to a write gate signal, a first emission transistor that provides a first power supply voltage to the second electrode of the first capacitor in response to a first emission signal, a first initialization transistor that provides a first initialization voltage to the control electrode of the driving transistor in response to an initialization gate signal, a second initialization transistor that provides a second initialization voltage to a second electrode of the driving transistor in response to a bias gate signal, and a light emitting element that emits light.

Pixel circuit and display device including the same

A gate driver according to an exemplary embodiment of the present inventive concept includes a pull-up-pull-down circuit configured to pull up a gate signal to a high level of a first clock signal in a first duration and configured to pull down the gate signal to a low level of the first clock signal in a second duration, and a pull-down boosting circuit configured to output a first off voltage to the pull-up-pull-down part in the second duration in response to a second clock signal.

Gate driver and display apparatus including the same

A display device includes: a substrate having a first area, a second area, and a bending portion between the first area and the second area; a first conductive line extending to the first area, the bending portion, and the second area along a first direction on a plane; and a second conductive line including a first contact portion and a first connection portion, the first contact portion being connected to the first conductive line at the first area and the first connection portion overlapping the first conductive line on a plane and extending along the first direction to the first area, the bending portion, and the second area, wherein the second conductive line further includes a corrosion retardation portion extending from the first contact portion.

Display device including a bending portion and conductive lines

An N-th stage of a gate driver includes a first control circuit, a gate signal generating circuit, a carry signal generating circuit, a second control circuit, a third control circuit, and a holding circuit. The first control circuit controls a first signal in response to a first input signal. The gate signal generating circuit generates a gate signal in response to a clock signal and the first signal. The carry signal generating circuit generates a carry signal in response to the clock signal and the first signal. The second control circuit controls the first signal in response to a second input signal. The third control circuit generates a hold control signal in response to a third input signal having a frequency lower than the clock signal's. The holding circuit maintains levels of the first signal, the gate signal, and the carry signal in response to the hold control signal.

Gate driver and a display apparatus including the same

A display device includes: a gate transmission wiring; a gate insulating layer disposed on the gate transmission wiring; and a pixel electrode and a data transmission wiring that are disposed on the gate insulating layer. When a gate signal voltage is applied to the gate transmission wiring, the gate transmission wiring may serve as a gate electrode that activates a semiconductor layer. In addition, when such a gate signal voltage is not applied thereto, the gate transmission wiring may form an electric field by a voltage difference between the gate transmission wiring and the pixel electrode, to thereby control a liquid crystal layer.

Display device having fewer electrodes

A thin-film transistor (TFT) array substrate includes a transistor disposed on a base substrate and a storage capacitor electrically connected to the transistor. The transistor includes a gate electrode, an active layer electrically insulated from the gate electrode, the active layer including a semiconductor material, and a first electrode and a second electrode disposed to be spaced apart from each other on the active layer. The storage capacitor includes a lower electrode including a light inflow path, and an upper electrode disposed to face the lower electrode and electrically connected to the second electrode.

Growing community of inventors

Seoul, South Korea

Hyunyoung Choi