Industry-university Cooperation Foundation Hanyang University

Samsung Electronics Co., Ltd.

Lg Electronics Inc.

Electronics and Telecommunications Research Institute

Hyuntae Kim

Jaeduk Han

Sanghun Lee

Hyeongmin Seo

Jeonghyu Yang

Eunji Song

YunSeong Jo

Youngdon Choi

Junghoon Kim

Hyunyoon Cho

Jeho Nam

Eunseok Shin

Inje Cho

Inkyung Kim

Doogie Lee

Jinhoon Kim

Uncheol Lee

Younhee Kim

Donghyun Cho

Kihyeok Bae

Jina Choi

Jea-Seung Jeong

Bermseok Noh

Hojin Ahn

Jihun You

Eunyub Jeon

Sunghwan Ong

Yeni Jang

A parallel-to-serial converter includes first to fourth input nodes configured to receive first to fourth data input signals, respectively, and an output node configured to output a data output signal. First to fourth logic circuits are provided, which are configured to electrically couple respective ones of the first to fourth input nodes one-at-a-time to the output node, in synchronization with first to fourth clock signals. The first logic circuit includes a first input circuit, a second input circuit, and an output circuit electrically coupled to the first and second input circuits. The output circuit includes a first pull-up transistor and a first pull-down transistor having drain terminals coupled to the output node, a second pull-up transistor connected between a source terminal of the first pull-up transistor and a first power supply node, and a second pull-down transistor connected between a source terminal of the first pull-down transistor and a second power supply node.

Semiconductor devices having parallel-to-serial converters therein

A storage system includes a host device including a file system configured to set a plurality of block expiration times respectively corresponding to a plurality of data blocks included in a file, and a storage device configured to store data according to control of the host device. The storage device includes a nonvolatile memory device configured to store the plurality of data blocks provided from the host device, a storage timer configured to provide a count value by counting time, and a data deletion manager. The data deletion manager generates a data deletion information table including a plurality of block deletion times based on the plurality of block expiration times provided from the host device. The data deletion manager deletes each data block of the plurality of data blocks stored in the nonvolatile memory device based on the data deletion information table and the count value.

Storage system and method of data management of the same

According to an aspect, a data inversion circuit configured to perform DBI-DC encoding using a PAM 4 signal may comprise a data generation unit configured to generate input data based on the PAM 4 signal and a data transmission unit comprising, an auxiliary signal generation unit configured to generate an auxiliary signal that determines whether to perform encoding on the input data by analyzing a plurality of data symbols included in the input data, a channel comprising a plurality of data lines and a data encoding unit configured to generate encoded data by performing DBI (data bus inversion) encoding on the data based on the auxiliary signal and to transmit the generated encoded data to a data reception unit via the channel.

Data inversion circuit to perform DBI-DC encoding using PAM 4 signal

According to an aspect, a data inversion circuit configured to perform DBI-AC encoding using a PAM 4 signal may comprise a data generation unit configured to generate input data based on the PAM 4 signal, a channel comprising N data lines, a first auxiliary signal generation unit configured to generate a first auxiliary signal that determines whether to perform a first encoding on the input data based on the number of each of a plurality of data symbols included in the input data, a first data encoding unit configured to generate intermediate data by performing the first encoding on the input data based on the first auxiliary signal, a second auxiliary signal generation unit configured to generate a second auxiliary signal that determines whether to perform a third encoding on the intermediate data by analyzing the relationship between a plurality of data symbols at a current time point and a plurality of data symbols at a previous time point included in the intermediate data and a second data encoding unit configured to generate encoded data by performing the third encoding on the intermediate data based on the second auxiliary signal, and to transmit the generated encoded data to a data reception unit via the channel and the first auxiliary signal and the second auxiliary signal may be combined into one signal and implemented as a PAM 4 signal.

Data inversion circuit to perform DBI-AC encoding using PAM 4 signal

A high-speed 4:1 multiplexer according to an embodiment comprises an input circuit unit including a first circuit that receives a first data as an input signal, and outputs a first output data as an output signal, a second circuit that receives a second data as an input signal, and outputs a second output data as an output signal, a third circuit that receives a third data as an input signal, and outputs a third output data as an output signal, and a fourth circuit that receives a fourth data as an input signal, and outputs a fourth output data as an output signal, a first stage for dividing the output data of the input circuit unit by two and receiving as an input signal, and outputting a first intermediate data and a second intermediate data as an output signal and a second stage of receiving the first intermediate data and the second intermediate data as an input signal and outputting a final data as an output signal.

High speed 4:1 multiplexer

The present disclosure relates to an electronic device capable of performing both fourth-generation (4G) and fifth-generation (5G) communications, which includes a communication unit configured to perform wireless communication with a base station according to at least one of a first communication method and a second communication method, and a modem configured to determine whether an establishment of a communication link according to the first communication method is allowed when a first communication link command according to the first communication method is to received from the base station, and to establish the communication link according to the first communication method based on a result of the determination or re-attempt to establish the communication link according to the first communication method through a recovery process, and wherein the modem interrupts the recovery process to prevent repeated exchange of unnecessary messages with the base station when the establishment of the communication link according to the first communication method is failed even though the establishment of the communication link according to the first communication method is attempted a preset number of times.

Electronic device and method for controlling the same

Disclosed are a method of generating a watermark, a method of generating a broadcast content including the same, and a watermarking system. The method of generating a watermark according to an exemplary embodiment of the present disclosure includes: determining a size of a target image to which a broadcast content is provided; determining the number of watermarks to be inserted into one frame of the target image; generating a watermark insert pattern by using the size of the target image and the number of watermarks; and scaling up the watermark insert pattern to a predetermined pattern for inserting the watermark insert pattern into an original image of the broadcast content.

Watermark generating method, broadcast content generating method including the same and watermarking system

Growing community of inventors

Seoul, South Korea

Hyuntae Kim