Samsung Electronics Co., Ltd.

Hyunsil Hong

Yoonyoung Choi

Seungjin Kim

Hyunchul Lee

Byunghyun Lee

Jinwoo Bae

Byeongjoo Ku

Sangjae Park

Bowo Choi

Donghwi Shin

Jongcheon Kim

Hangeol Lee

Kijeong Kim

In a method of forming a wiring, an insulating interlayer including a low-k dielectric material is formed on a substrate. A first etching mask is formed on the insulating interlayer. A first etching process is performed using the first etching mask to form a first opening through the insulating interlayer. The first etching mask is removed. A protection pattern is formed on a bottom and a side of the first opening. A second etching mask is formed on the protection pattern and the insulating interlayer. A second etching process is performed using a second etching mask to form a second opening through the insulating interlayer. The second etching mask is removed. The protection pattern is removed. A wiring is formed in each of the first and second openings.

Method of forming a wiring and method of manufacturing a semiconductor device using the same

Capacitor forming methods may include sequentially forming a first mold layer, a first support material layer, and a second mold layer on a substrate, forming a mask pattern on the second mold layer, forming a recess in the second mold layer, the first support material layer, and the first mold layer using the mask pattern as a mask, forming a lower electrode in the recess, removing the mask pattern by a dry cleaning process, reducing a width of an upper portion of the lower electrode, removing the first mold layer, forming a dielectric layer on a surface of the lower electrode, and forming an upper electrode on the dielectric layer.

Methods of fabricating capacitor and semiconductor device and semiconductor devices and apparatus including the same

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Hyunsil Hong