Samsung Electronics Co., Ltd.

Hyunmook Choi

Sanghoon Kim

Jihong Kim

Jooheon Kang

Boyoung Kim

MinHo Kim

Euihyung Yoo

Kwansoo Lee

Hwichul Kim

Sanghyeok Lee

A nonvolatile memory device includes a memory cell region and a peripheral circuit region disposed below the memory cell region. The peripheral circuits include a page buffer, a row decoder, and other peripheral circuits, wherein the page buffer is included in a page buffer block disposed on a lower surface of the first semiconductor substrate to be distinguished from other circuits included in the peripheral circuit region in a first direction perpendicular to an upper surface of the first semiconductor substrate, is connected to the memory cell region through a connection portion penetrating through the first semiconductor substrate, and includes a plurality of vertical transistors each defined by a source region, a channel region, and a drain region stacked in sequence in the first direction.

Nonvolatile memory device and storage device

A semiconductor device includes a horizontal wiring layer on a substrate, a stack structure disposed on the horizontal wiring layer and including insulating layers and electrode layers alternately stacked on each other, and a pillar structure extending into the horizontal wiring layer and extending through the stack structure. The electrode layers include one or a plurality of selection lines adjacent to an uppermost end of the stack structure, and word lines surrounding the stack structure below the one or plurality of selection lines. The pillar structure includes a variable resistive layer, a channel layer between the variable resistive layer and the stack structure, a gate dielectric layer between the channel layer and the stack structure, and a blocking pattern disposed between the variable resistive layer and the channel layer and being adjacent to a first selection line among the one or plurality of selection lines.

Semiconductor device including blocking pattern, electronic system, and method of forming the same

Provided are a display apparatus, and a method and system for controlling the same, the display apparatus including: a display; an interface; a storage; and a processor configured to transmit information on a refresh rate of the display, stored in the storage, to a source apparatus connected to the interface; based on an image signal received from the source apparatus being displayed as an image on the display at a preset first refresh rate for more than a predetermined period, switch the refresh rate, stored in the storage, to a second refresh rate that is lower than the first refresh rate; transmit information about the second refresh rate to the source apparatus; and display the image on the display at the second refresh rate of the image signal received from the source apparatus.

Display apparatus, and method and system for controlling the same

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Suwon-si, South Korea

Hyunmook Choi