Samsung Electronics Co., Ltd.

Hitachi-Lg Data Storage Korea, Inc.

Hyunmin Lee

Hyeong Geun Park

Jongwon Kim

Seungmin Song

Jung-Hwan Lee

Joowon Park

Jeeyong Kim

Hojong Kang

Hyunchul Back

Jihye Kim

Changseok Kang

Jingyu Seo

Seonghwan Choi

Minji Kang

A semiconductor memory device includes a stack structure including gate electrodes vertically stacked on a substrate and a vertical channel part penetrating the gate electrodes, a bit line connected to the vertical channel part, and a plurality of conductive lines connected to the gate electrodes on the stack structure. The conductive lines form a plurality of stacked layers and include first conductive lines and second conductive lines. The number of the first conductive lines disposed at a first level from the substrate is different from the number of the second conductive lines disposed at a second level from the substrate. The first level is different from the second level.

Semiconductor memory devices

Display screen or portion thereof with transitional graphical user interface

Disclosed herein is a reception device for wireless charging. The reception device for wireless charging may include a reception antenna configured to generate an electric current based on a change of magnetism and a charging circuit unit configured to convert the electric current generated by the reception antenna into direct current. The reception antenna and the charging circuit unit may be connected to a flexible board. Accordingly, the reception device can be attached to the casing of a smart terminal while minimizing a change in the thickness of the smart terminal. A task for connecting the antenna and charging circuit unit of the reception device can be eliminated. A wireless charging function can be assigned to a smart terminal by simply replacing the casing of the smart terminal not having the wireless charging function.

Reception device for wireless charging

Inventive concepts provide semiconductor memory devices and methods of fabricating the same. A stack structure and vertical channel structures are provided on a substrate. The stack structure includes insulating layers and gate electrodes alternately and repeatedly stacked on the substrate. The vertical channel structures penetrate the stack structure. Conductive pads are disposed on the vertical channel structures. An etch stopper covers sidewalls of the conductive pads. Pad contacts are disposed on the conductive pads to be in contact with the conductive pads. The pad contacts are further in contact with the etch stopper.

Semiconductor memory device and method of fabricating the same

Semiconductor devices and methods of fabricating the same are provided. The semiconductor device may include interconnections extending in a first direction on a substrate and spaced apart from each other in a second direction perpendicular to the first direction, barrier dielectric patterns disposed on top surfaces of the interconnections, respectively, and an upper interlayer dielectric layer disposed on the interconnection. Respective air gaps are disposed between adjacent ones of the interconnections.

Integrated circuit devices including interconnections insulated by air gaps and methods of fabricating the same

Growing community of inventors

Seoul, South Korea

Hyunmin Lee