Samsung Electronics Co., Ltd.

Hyunki Kim

Yongkwan Lee

Sangsoo Kim

Sunchul Kim

Junwoo Park

Eun Joo Jang

Shin Ae Jun

Seung Hwan Kim

Tae Gon Kim

Hyo Sook Jang

Yuho Won

Yongwook Kim

Taekhoon Kim

Pyoungwan Kim

Juhyeon Oh

Jongho Park

Jongho Lee

Jongbo Shim

Kyung Suk Oh

Su-Min Park

Kyungsuk Oh

Yesin Ryu

Hyunggil Baek

Junyoung Oh

Yoonna Oh

Seungkon Mok

Junga Lee

Byoung Wook Jang

Dongha Kim

Changyoung Yoo

Chanhee Jeong

Inku Kang

Heeyeol Kim

Seunghwan Kim

Youngmin Lee

Dongwook Kim

Sungchul Park

Sang-Won Lee

Heeseok Lee

Yonghoon Kim

Kyoungsei Choi

Choongbin Yim

Jihwang Kim

Jongwan Kim

Jungjoo Kim

Hoyoung Song

SeokWon Lee

Ju-Seop Park

Sung-Kyu Park

Youngja Kim

Young-Ja Kim

Sungkyu Park

Huijun Shim

Jaekwang Lee

Insup Shin

JiSun Hong

Taejun Jeon

Changmin Han

Byoungwook Jang

Yun-Young Kim

Dongsu Lee

A method of manufacturing a semiconductor package includes estimating an error in a solder ball attaching process, determining a specification of a ball tool and a method of the solder ball attaching process, based on the estimated error, manufacturing the ball tool according to the determined specification thereof, and performing the solder ball attaching process based on the method of the solder ball attaching process. The determining of the specification of the ball tool and the method of the solder ball attaching process includes determining a number of a plurality of holders in the ball tool and a position and a width of each of the plurality of holders, determining a number of a plurality of working regions of a substrate and a position and a width of each of the plurality of working regions, and dividing a substrate into the plurality of working regions.

Method of manufacturing semiconductor package

A semiconductor package includes a first substrate, a second substrate provided on the first substrate, a semiconductor chip provided between the first substrate and the second substrate, solder structures extending between the first substrate and the second substrate and spaced apart from the semiconductor chip, and bumps provided between the semiconductor chip and the second substrate. The solder structures electrically connect the first substrate and the second substrate.

Semiconductor package

In a memory device, a control circuit detects determines an aggressor row address, indicating an aggressor row of a memory cell array, at a random time. The aggressor row address or a value derived from the aggressor row address is stored in a queue. The control circuit controls a refresh operation of one or more victim rows based on the aggressor row address in response to a targeted refresh command.

Memory device refresh operations

An apparatus includes: a vapor generating chamber configured to accommodate a heat transfer fluid and to be filled with saturated vapor generated by the heat transfer fluid; a heater configured to heat the heat transfer fluid in the vapor generating chamber; a substrate stage configured to be movable upward or downward in the vapor generating chamber and to support a substrate on which an electronic device is mounted via a solder. The apparatus also includes at least one mesh plate extending in a horizontal direction in the vapor generating chamber. The at least one mesh plate includes a plurality of openings through which the vapor moves.

Solder reflow apparatus and method of manufacturing an electronic device

A nanocrystal particle including at least one semiconductor material and at least one halogen element, the nanocrystal particle including: a core comprising a first semiconductor nanocrystal; and a shell surrounding the core and comprising a crystalline or amorphous material, wherein the halogen element is present as being doped therein or as a metal halide.

Nanocrystal particles and processes for synthesizing the same

A semiconductor package includes a package substrate having a communication hole extending from an upper surface of the package substrate to a lower surface of the package substrate, a semiconductor chip attached to the upper surface of the package substrate, an auxiliary chip attached to the lower surface of the package substrate, external connection terminals attached to the lower surface of the package substrate and spaced apart from the auxiliary chip, and an encapsulant encapsulating the semiconductor chip and the auxiliary chip and filling the communication hole.

Semiconductor package having package substrate

A touch display apparatus is provided. The touch display apparatus includes a display panel including a display surface, a light guide plate disposed over the display surface of the display panel and formed to emit light incident into one side surface of the light guide plate through an upper surface of the light guide plate, a first light source array disposed on one side of the light guide plate and including a plurality of infrared light sources configured to emit infrared rays to an one side surface of the light guide plate, a camera disposed on at least one side of the first light source array and configured to photograph infrared rays emitted through an entire area of the upper surface of the light guide plate, and a processor configured to recognize coordinates of an input object adjacent to the upper surface of the light guide plate using infrared rays images captured by the camera.

Touch display apparatus with light guide plate using infrared light for touch detection

A memory device includes a row decoder, a column decoder, and a repair control circuit, which is configured to: (i) compare a row address with a stored failed row address, (ii) compare a column address with a stored failed column address, (iii) control the row decoder to activate the at least one of a plurality of redundancy word lines when the row address corresponds to the failed row address, and (iv) control the column decoder to activate at least one of a plurality of redundancy bit lines when the column address corresponds to the failed column address. The repair control circuit varies a repair unit according to an address input during a repair operation.

Memory devices having variable repair units therein and methods of repairing same

A semiconductor package including a circuit substrate including a plurality of interconnections; a first chip on the circuit substrate; a second chip stacked on the first chip; a plurality of first pads on the circuit substrate, the plurality of first pads overlapping the first chip; a plurality of bumps between the circuit substrate and the first chip; a plurality of second pads on an edge portion of a first side of the circuit substrate, the plurality of second pads electrically connected to the second chip through a conductive wire; an underfill that fills a space between the circuit substrate and the first chip; and a first dam on the circuit substrate, the first dam overlapping the first chip. The first dam includes a conductive material and overlaps at least one of the plurality of interconnections.

A semiconductor package including a first package substrate, a first semiconductor chip on the first package substrate, a first conductive connector on the first package substrate and laterally spaced apart from the first semiconductor chip, an interposer substrate on the first semiconductor chip and electrically connected to the first package substrate through the first conductive connector, the interposer substrate including a first portion overlapping the first semiconductor chip and a plurality of upper conductive pads in the first portion, a plurality of spacers on a lower surface of the first portion of the interposer substrate and positioned so as not to overlap the plurality of upper conductive pads in a plan view, and an insulating filler between the interposer substrate and the first package substrate may be provided.

Interposer and semiconductor package including the same

A memory device includes a memory cell array, a random bit generator, a comparator and a refresh controller. The memory cell array includes a plurality of memory cells coupled to a plurality of word-lines. The random bit generator generates a random binary code having a predetermined number of bits. The comparator compares the random binary code and a reference binary code to output a matching signal based on a result of the comparison. The refresh controller refreshes target memory cells from among the plurality of memory cells based on addresses accessed by a memory controller during a sampling period randomly determined based on the matching signal and a refresh command from the memory controller.

Memory device performing refresh operation based on a random value and method of operating the same

Disclosed is a semiconductor package comprising a package substrate, a first semiconductor chip on the package substrate and including a first region and a second region, a second semiconductor chip on the first region, a heat radiation spacer on the second region, a third semiconductor chip supported by the second semiconductor chip and the heat radiation spacer, and a molding layer covering the first to third semiconductor chips and the heat radiation spacer.

Semiconductor package for discharging heat generated by semiconductor chip

Growing community of inventors

Asan-si, South Korea

Hyunki Kim