Samsung Electronics Co., Ltd.

Hyungjoon Kwon

Jongchul Park

Sechung Oh

Wonjun Lee

Sangmin Lee

Jaehun Seo

Inho Kim

Jongsoon Park

Vladimir Urazaev

Gwang-Hyun Baek

Jinhye Bae

Ken Tokashiki

Sungyoon Chung

Woojin Kim

Chanjin Park

Soonoh Park

Joonkyu Rhee

A method of manufacturing a semiconductor device may include forming a material layer on a substrate, performing a selective oxidation process to form a capping oxide layer on a first surface of the material layer, wherein a second surface of the material layer is not oxidized, and etching the material layer through the second surface to form a material pattern. An etch rate of the capping oxide layer is less than an etch rate of the material layer. A semiconductor device may include a lower electrode on a substrate, a data storage part on a top surface of the lower electrode, an upper electrode on the data storage part, and a capping oxide layer arranged on at least a portion of a top surface of the upper electrode. The capping oxide layer may include an oxide formed by oxidation of an upper surface of the upper electrode.

Semiconductor devices and methods of manufacturing the same

Provided are semiconductor devices and methods of fabricating the same. The semiconductor device may include lower wires, upper wires crossing the lower wires, select elements provided at intersections between the lower and upper wires, and memory elements provided between the select elements and the upper wires. Each of the memory elements may include a lower electrode having a top width greater than a bottom width, and a data storage layer including a plurality of magnetic layers stacked on a top surface of the lower electrode and having a rounded edge.

Semiconductor devices and methods of fabricating the same

A pattern-forming method includes providing a first ion beam at a first incidence angle and a second ion beam at a second incidence angle to a surface of an etch target layer formed on a substrate. Patterns are formed by patterning the etch target layer using the first and second ion beams. The first ion beam and the second ion beam are substantially symmetrical to each other with respect to a normal line that is perpendicular to a top surface of the substrate. Each of the first and second incidence angles is greater than 0 degrees and smaller than an angle obtained by subtracting a predetermined angle from 90 degrees.

Ion beam apparatus generating ion beams of bilateral symmetry

A patterning method includes forming an etch-target layer on a substrate, forming mask patterns on the etch-target layer, and etching the etch-target layer using the mask patterns as an etch mask to form patterns spaced apart from each other. The etching process of the etch-target layer includes irradiating the etch-target layer with an ion beam, whose incident energy ranges from 600 eV to 10 keV. A recess region is formed in the etch-target layer between the mask patterns, and the ion beam is incident onto a bottom surface of the recess region at a first angle with respect to a top surface of the substrate and is incident onto an inner side surface of the recess region at a second angle with respect to the inner side surface of the recess region. The first angle ranges from 50&#xb0; to 90&#xb0; and the second angle ranges from 0&#xb0; to 40&#xb0;.

Magnetic memory devices having sloped electrodes

Patterning methods, methods of fabricating semiconductor devices using the same, and semiconductor devices fabricated thereby

Method of forming a pattern using ion beams of bilateral symmetry, a method of forming a magnetic memory device using the same, and an ion beam apparatus generating ion beams of bilateral symmetry

Provided are a magnetic memory device and a method of fabricating the same. The device may include a magnetic tunnel junction including a lower magnetic structure, an upper magnetic structure, and a tunnel barrier interposed therebetween. The tunnel barrier may have a width greater than that of the lower magnetic structure.

Magnetic device and method of fabricating the same

A magnetic memory device may include a lower electrode on a substrate, a memory element on the lower electrode, an upper electrode on the memory element, and a protection spacer enclosing a portion of a side surface of the lower electrode and protruding laterally from the side surface of the lower electrode. The protection spacer may have a bottom surface that is positioned at a level higher than that of a bottom surface of the lower electrode.

Magnetic memory devices

Growing community of inventors

Seongnam-si, South Korea

Hyungjoon Kwon