Samsung Electronics Co., Ltd.

Sungkyunkwan University

Hyungdong Roh

Myung-Jin Lee

Jaekeun Lee

Michael Choi

Yonghee Lee

Yong Ki Lee

Jungho Kim

Bai-Sun Kong

Youngjae Cho

Hyochul Shin

Byungwoo Koo

Sunwoo Kwon

Sunghan Do

Sung-No Lee

Mooyeol Choi

Disclosed is an electronic device which includes an audio processing block for voice recognition in a low-power mode. The electronic device includes a digital microphone that receives a voice signal from a user and converts the received voice signal into a PDM signal, and a DMIC interface circuit. The DMIC interface circuit includes a PDM-PCM converting block that converts the PDM signal into a PCM signal, a maxscale gain tuning block that tunes a maxscale gain of the PCM signal received from the PDM-PCM converting block based on a distance information indicating a physical distance between the user and the electronic device acquired in advance of the converting of the PDM signal, and an anti-aliasing block that performs filtering for acquiring voice data of a target frequency band associated with a PCM signal output from the maxscale gain tuning block.

Digital microphone interface circuit for voice recognition and including the same

A digital-to-analog converter (DAC) includes a current array having a plurality of unit cells in a plurality of rows and a plurality of columns, an arbitrary switch box and processing circuitry configured to randomly select a subset of rows among the plurality of rows based on a plurality of first row selection signals, the subset of rows including first unit cells among the plurality of unit cells, randomly select one row among the plurality of rows based on a plurality of second row selection signals, select a subset of columns among the plurality of columns based on column selection signals, second unit cells among the plurality of unit cells being included in both the one row and the subset of columns, and generate an analog output signal corresponding to a digital input signal based on the first unit cells and the second unit cells.

Digital-to-analog converter and electronic system including the same

An audio device includes a channel detection electrode and a jack detector configured to determine whether the channel detection electrode is in contact with a jack according to voltage variation of a detection node. The jack detector includes a first resistor coupled between the detection node and a first node to which a first voltage is supplied, a second resistor coupled between the detection node and the channel detection electrode, a third resistor coupled between the detection node and a second node, and a comparator configured to compare a voltage at the detection node with a reference voltage.

Audio device including jack detector

An audio jack detection circuit includes an impedance detecting circuit configured to generate a detection signal corresponding to an impedance between a ground pin and a ground detection pin, which are in contact with a ground terminal of an audio jack socket, and a controller configured to determine a state of the audio jack socket based on the detection signal. A detection range of the impedance detected by the impedance detector may be controlled by varying a resistance of a pull-up resistor connected to the ground detection pin.

Apparatus and method of detecting audio jack

Disclosed is an audio device including an audio codec circuit connected to a first channel electrode, a second channel electrode, and a microphone detection electrode, and a jack detection circuit connected to a first channel detection electrode, a ground detection electrode, and the microphone detection electrode, and, in response to voltages of the first channel detection electrode and the ground detection electrode corresponding to a ground voltage, the jack detection circuit detects insertion of a jack, applies the ground voltage to the ground detection electrode, and applies a bias voltage to the microphone detection electrode.

Audio device and multimedia device including audio device

A delta-sigma modulator includes a loop filter, a quantizer configured to change an analog output signal into a digital signal, and a digital-to-analog converter configured to receive the digital signal and including a first capacitor and a second capacitor. In a first sampling period, the first capacitor is discharged, and at the same time, the second capacitor is charged with a reference voltage. In a second sampling period, the digital signal includes noise caused by a clock jitter, the first capacitor is charged with a reference voltage, and the second capacitor is discharged and generates a charge corresponding to the noise. In a next first sampling period, the first capacitor is discharged, and at the same time, the second capacitor generates a noise current corresponding to the noise using the charge and is charged with a reference voltage.

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Yongin-si, South Korea

Hyungdong Roh