Broadcom Corporation

Hyung Won Kim

Chuen-Shen Bernard Shung

Dennis Sungik Lee

A process of repairing defects in linked list memories including selecting one of a group of the linked list memories and an additional memory, as a defect marking memory, detecting faults in rows of the defect marking memory, and storing row addresses having at least one fault in defect address registers. The method detects faults in rows of other linked list memories, where the other linked list memories are the linked list memories other than the defect marking memory, and stores a marking code for each row address of the other linked list memories in the defect marking memory. The defect address registers and the defect marking memory are searched when addresses of the linked list memories are linked and row addresses having a specific marking code skipped in the linking process.

Self-repairing built-in self test for linked list memories

One of a linked list memories is selected as a defect marking memory and faults in rows of the defect marking memory are detected. Row addresses having at least one fault in defect address registers are stored. Faults in rows of other linked list memories are detected, where the other linked list memories are the linked list memories other than the defect marking memory and a marking code is stored for each row address of the other linked list memories in the defect marking memory, where a particular marking code indicates whether a particular row address has at least one fault. The defect address registers and the defect marking memory are searched when addresses of the linked list memories are linked and row addresses indicated as having at least one fault are skipped in the linking process.

A process of handling packet data in a packet buffer is disclosed. Free pointers are stored in a plurality of free pointer queues, with each of the plurality free pointer queues in a form of a linked list and the free pointers are retrieved from each of the plurality of free pointer queues and storing in a prefetch memory to provide a throughput of one free pointer per clock cycle. When an initial portion of a data packet is received, two free pointers are retrieved from the prefetch memory. One of the two free pointers is stored in a start pointer register connoting a start of the data packet and one free pointer is supplied for data elements of the data packet. One free pointer per middle data element is supplied, while no new pointer is needed for the end of packet data element. The start of the data packet is linked with an end of packet portion of a previously received packet in an output queue memory and a data element is read out of the data packet from the output queue memory when selected by a transmission scheduler and releasing a pointer of the data element to one of the plurality of free pointer queues in a way that balances the lengths of all free pointer queues. Additionally, all pointers of a packet are released to one of the plurality of free pointer queues within one cycle when the packet is dropped.

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San Jose, CA, United States of America

Hyung Won Kim