Samsung Electronics Co., Ltd.

Hyung-suk Lee

Yun-il Lee

Sung-il Park

Yong-Ho Jeon

Kye-Hyun Baek

Jae-hyun Park

Cheol Kyu Kim

Mirco Cantoro

Cheol Jin Kim

Jeong-gyu Park

Dong-hun Lee

Dong-Kwon Kim

Yeon-Cheol Heo

Byoung-Gi Kim

Chang-Min Yoe

Seung-Chan Yun

An integrated circuit (IC) device includes a first region and a second region adjacent to each other along a first direction on a substrate, fin patterns in each of the first and second regions extending along a second direction perpendicular to the first direction; gate electrodes extending along the first direction and intersecting the fin patterns; and an isolation region between the first and second regions, a bottom of the isolation region having a non-uniform height relative to a bottom of the substrate.

Integrated circuit device and method of forming the same

A semiconductor device includes a first semiconductor pattern doped with first impurities on a substrate, a first channel pattern on the first semiconductor pattern, second semiconductor patterns doped with second impurities contacting upper edge surfaces, respectively, of the first channel pattern, and a first gate structure surrounding at least a portion of a sidewall of the first channel pattern.

Semiconductor devices

Provided is a method for manufacturing a semiconductor device, which can secure a sufficient margin in a process of forming a self-aligned contact. The method includes forming a plurality of gate structures arranged in parallel on a substrate and being spaced apart from each other, each of the plurality of gate structures including a conductive layer and a capping layer formed on the conductive layer, forming a first insulation layer between each of the plurality of gate structures, recessing top portions of the plurality of gate structures, forming a block layer along a top surface of the first insulation layer and the recessed top portions of the plurality of gate structures, forming a hardmask layer on the block layer, forming a hardmask pattern on each of the plurality of gate structures by planarizing a top portion of the block layer and a top portion of the hardmask layer, and forming a second insulation layer along a top surface of the block layer and top surfaces of the hardmask patterns.

Method for manufacturing semiconductor device

A power supply device includes a power supply configured to supply DC power, and a PMIC configured to convert DC power provided from the power supply and to provide the converted DC power to an SoC, wherein the PMIC is provided with a plurality of rails configured to output different voltages.

Power supply device and micro server having the same

Growing community of inventors

Suwon-si, South Korea

Hyung-suk Lee