Samsung Electronics Co., Ltd.

University of Seoul Industry Cooperation Foundation

Hyung-su Jeong

Jun-youn Kim

Young-jo Tak

Jae-Won Lee

Young-soo Park

Ho-jung Kim

Su-hee Chae

Bok-ki Min

Hyun-sik Choi

Hyun-gi Hong

Jai-kwang Shin

Taek Woon Kim

Jae-Chul Park

Kyoung-kook Kim

Moon-seung Yang

Ki-chul Kim

Hyuk-Soon Choi

Ji-hoon Lee

Jae-won Lee

Yong-cheol Choi

Nam-young Lee

Joong-ho Choi

Min-kwon Cho

A transistor includes a device portion and a collector layer. The device portion is in a first side of a semiconductor substrate, and includes a gate and an emitter. The collector layer is on a second side of the semiconductor substrate, which is opposite to the first side. The collector layer is an impurity-doped epitaxial layer and has a doping profile with a non-normal distribution.

Transistors and methods of manufacturing the same

A logic device may include a first functional block, the first functional block including, a first storage block, a second storage block, and a first function controller. In a first operation time period, the first function controller may be configured to receive a first configuration selection signal and a first configuration command signal that instructs a first function be configured, select the first storage block as a configured storage block in the first operation time period based on the first configuration selection signal, and configure the first function in the first storage block based on the first configuration command signal.

Logic device and method of operating the same

Example embodiments are directed to a light-emitting device including a patterned emitting unit and a method of manufacturing the light-emitting device. The light-emitting device includes a first electrode on a top of a semiconductor layer, and a second electrode on a bottom of the semiconductor layer, wherein the semiconductor layer is a pattern array formed of a plurality of stacks. A space between the plurality of stacks is filled with an insulating layer, and the first electrode is on the insulating layer.

Vertical light-emitting devices having patterned emitting unit and methods of manufacturing the same

Substrate structures and methods of manufacturing the substrate structures. A substrate structure is manufactured by forming a protrusion area of a substrate under a buffer layer, and forming a semiconductor layer on the buffer layer, thereby separating the substrate from the buffer layer except in an area where the protrusion is formed. The semiconductor layer on the buffer layer not contacting the substrate has freestanding characteristics, and dislocation or cracks may be reduced and/or prevented.

Substrate structures and methods of manufacturing the same

A light emitting device may include a substrate, an n-type clad layer, an active layer, and a p-type clad layer. A concave-convex pattern having a plurality of grooves and a mesa between each of the plurality of grooves may be formed on the substrate, and a reflective layer may be formed on the surfaces of the plurality of grooves or the mesa between each of the plurality of grooves. Therefore, light generated in the active layer may be reflected by the reflective layer, and extracted to an external location.

Light emitting device and method of manufacturing the same

The logic circuit includes at least one variable resistance device configured such that a resistance value of the at least one variable resistance device varies according to at least one selected value. The selected value is selected from among a voltage and a current of an input signal, and the at least one variable resistance device is configured to memorize the resistance value. The logic circuit is configured to store multi-level data by setting the memorized resistance value.

Logic circuit, integrated circuit including the logic circuit, and method of operating the integrated circuit

In one example embodiment, the semiconductor device includes a memory cell array having at least one memory cell disposed in a region at which at least one bit line and at least one word line cross. A sensing unit senses data stored in the at least one memory cell. The sensing unit includes a connection control unit configured to control a connection between the at least one bit line and a sensing line based on a control signal, the control signal having a voltage level that varies based on a value of data being sensed by the sensing unit.

Semiconductor device and method of sensing data of the semiconductor device

A digital-to-analog converter (DAC) includes: a plurality of first controllers and a plurality of resistor devices. The plurality of first controllers are configured to be selectively switched on according to a received digital signal to control an analog signal according to the received digital signal. The plurality of resistor devices are respectively connected to the plurality of first controllers. The plurality of resistor devices include non-volatile memory devices.

Resistor devices and digital-to-analog converters using the same

Provided is a light emitting diode (LED) manufactured by using a wafer bonding method and a method of manufacturing a LED by using a wafer bonding method. The wafer bonding method may include interposing a stress relaxation layer formed of a metal between a semiconductor layer and a bonding substrate. When the stress relaxation layer is used, stress between the bonding substrate and a growth substrate may be offset due to the flexibility of metal, and accordingly, bending or warpage of the bonding substrate may be reduced or prevented.

A gallium nitride (GaN) light emitting device and a method of manufacturing the same are provided, the method including sequentially forming a buffer layer and a first nitride layer on a silicon substrate, and forming a plurality of patterns by dry etching the first nitride layer. Each pattern includes a pair of sidewalls facing each other. A reflective layer is deposited on the first nitride layer so that one sidewall of the pair is exposed by the reflective layer. An n-type nitride layer that covers the first nitride layer is formed by horizontally growing an n-type nitride from the exposed sidewall, and a GaN-based light emitting structure layer is formed on the n-type nitride layer.

Gallium nitride light emitting devices and methods of manufacturing the same

Provided is a method of manufacturing a light emitting device from a large-area bonding wafer by using a wafer bonding method using. The method may include forming a plurality of semiconductor layers, each having an active region for emitting light, on a plurality of growth substrates. The method may also include arranging the plurality of growth substrates on which the semiconductor layers are formed on one bonding substrate and simultaneously processing each of the semiconductor layers formed on each of the growth substrates through subsequent processes. The bonding wafer may be formed of a material that reduces or prevents bending or warping due to a difference of thermal expansion coefficients between a wafer material, such as sapphire, and a bonding wafer. According to the above method, because a plurality of wafers may be processed by one process, mass production of LEDs may be possible which may reduce manufacturing costs.

Growing community of inventors

Suwon-si, South Korea

Hyung-su Jeong