International Business Machines Corporation

Lam Research Corporation

Lab Research Corporation

Hyung Joo Shin

Eric A Hudson

Mark Henry Wilcoxson

Kalman Pelhos

Fee Li Lie

John Ryan Sporre

Eric R Miller

Nicole A Saulnier

Jeffrey C Shearer

Siva Kanakasabapathy

A method for manufacturing a semiconductor device includes forming a plurality of gate structures spaced apart from each other on a fin, forming an inorganic plug portion on the fin between at least two gate structures of the plurality of gate structures, forming a dielectric layer on the fin and between remaining gate structures of the plurality of gate structures, forming an organic planarizing layer (OPL) on the plurality of gate structures and on the inorganic plug portion, removing a portion of the OPL to expose the inorganic plug portion, selectively removing the inorganic plug portion, and forming a contact on the fin in place of the removed inorganic plug portion.

Method and structure for forming a replacement contact

An approach to optimizing the throughput in an atomic layer deposition process. The approach charges a first wafer chamber with a first gas from a first storage tank for a first cycle run and determines whether the first cycle run has completed. The approach transfers the first gas from the first wafer chamber to a second wafer chamber and charges the first wafer chamber with a second gas from a second storage tank for a second cycle run and determines whether the second cycle run has completed. The approach transfers the first gas from the second wafer chamber to the first storage tank and transfers the second gas from the first wafer chamber to the second wafer chamber for a third cycle run. The approach determines whether the third cycle run has completed and transfers the second gas from the second wafer chamber to the second storage tank.

Phase shifted gas delivery for high throughput and cost effectiveness associated with atomic layer etching and atomic layer deposition

Various embodiments herein relate to methods, apparatus and systems for forming a recessed feature in a dielectric-containing stack on a semiconductor substrate. Separate etching and deposition operations are employed in a cyclic manner. Each etching operation partially etches the feature. Each deposition operation forms a protective coating (e.g., a metal-containing coating) on the sidewalls of the feature to prevent lateral etch of the dielectric material during the etching operations. The protective coating may be deposited using methods that result in formation of the protective coating along substantially the entire length of the sidewalls. The protective coating may be deposited using particular reaction mechanisms that result in substantially complete sidewall coating. Metal-containing coatings have been shown to provide particularly good resistance to lateral etch during the etching operation. In some cases, a bilayer approach may be used to deposit the protective coating on sidewalls of partially etched features.

Technique to deposit metal-containing sidewall passivation for high aspect ratio cylinder etch

Growing community of inventors

Fremont, CA, United States of America

Hyung Joo Shin