Samsung Electronics Co., Ltd.

Yonsei University

Lg Electronics Inc.

Korea Institute of Science and Technology

S-Printing Solution Co., Ltd.

Hp Printing Korea Co., Ltd.

Hyun-Suk Lee

Gihee Cho

Jungoo Kang

Sanghyuck Ahn

Young-Ky Kim

Jin-Su Lee

Jae-min Ahn

In-Sun Park

Rak-Hwan Kim

Young-Joo Cho

Hyun-Seok Lim

Hongsik Chae

Soon-Young Yoon

Hee-Won Kang

Jin-Soo Park

Hyun-young Kim

Jang-Won Lee

Jae-Min Ahn

Jun-goo Kang

Jae-Yoel Kim

Hi-Chan Moon

Kwang-Jin Moon

Hyeon-Deok Lee

Jin-Woo Choi

Gyu-Hwan Oh

Hyun-seok Lim

Shin-Jae Kang

Kyung-Woo Nam

Jiwoon Park

Sangyeol Kang

Taekyun Kim

Jung-Wook Kim

Nak-Hyun Lim

Gi-hee Cho

Jae-Won Lee

Youn-Sun Kim

Dae-Gyun Kim

Sung-Tae Kim

Dong-Ho Cho

Sung-Won Lee

Young-Ki Kim

Jong-myeong Lee

Young-Woo Kwak

Hoon-Dong Noh

Tae-kyun Kim

Sun-Mi Kim

Jung-hee Chung

Jae-Do Kwak

Byung-ki Cheong

Sang Yeol Kang

Jongmyeong Lee

Jong-Keun Youn

Do-Hun Kim

In-ho Lee

Heesook Park

Hee-jung Kim

Dongkyun Park

Jin-Ho Ahn

Ju-won Min

Dong-Kyun Park

Joung-hoon Choo

Taek-Sung Lee

Won-Mok Kim

Ji-sub Park

Hong Sik Chae

Gwang-Ha Park

Ki-Sung Jung

Gi Hee Cho

Jin-Ho Son

Sun-Ju Lee

Do-Yup Kim

Kyeong-Won Kim

Kyeong-Seok Lee

Kun-hoon Baik

Sung-Ho Cho

Min-Sou Lee

Soon Young Yoon

Jun Goo Kang

Sang Hyuck Ahn

Dai-IL Oh

Jae-In Lee

Seok-Jae Moon

An-Na Choi

A semiconductor memory device includes a capacitor having a bottom electrode and a top electrode, a dielectric layer between the bottom and top electrodes, and an interface layer between the top electrode and the dielectric layer, the interface layer including a metal oxide and an additional constituent at a grain boundary of the interface layer.

Method of fabricating a semiconductor memory device

A method of manufacturing a semiconductor device includes: forming electrode holes by etching a mold structure including a mold layer and a support layer which are stacked on a substrate; forming lower electrode pillars filling the electrode holes; etching a portion of the support layer between the lower electrode pillars to form a support pattern having a through-hole exposing a portion of a top surface of the mold layer; removing the mold layer through the through-hole to expose sidewalls of the lower electrode pillars; and selectively forming lower electrode patterns on the sidewalls and top surfaces of the lower electrode pillars.

Semiconductor devices including a support pattern on a lower electrode structure

A semiconductor device includes; a bottom electrode on a substrate, a supporting pattern between the bottom electrode and an adjacent bottom electrode, a top electrode covering the bottom electrode and the supporting pattern, and a dielectric layer between the bottom electrode and the top electrode and between the supporting pattern and the top electrode. The bottom electrode may include a first portion including a seam and a second portion on the first portion, a top end of the second portion may be disposed at a height lower than an upper surface of the supporting pattern, and a portion of a bottom end of the second portion may be exposed to the seam.

Semiconductor device

A semiconductor device and a method of manufacturing the same, the device including a plurality of lower electrodes on a semiconductor substrate; a support pattern connecting the lower electrodes at sides of the lower electrodes; and a dielectric layer covering the lower electrodes and the support pattern, wherein each of the plurality of lower electrodes includes a pillar portion extending in a vertical direction perpendicular to a top surface of the semiconductor substrate; and a protrusion protruding from a sidewall of the pillar portion so as to be in contact with the support pattern, the pillar portion includes a conductive material, the protrusion includes a same conductive material as the pillar portion and is further doped with impurities.

An integrated circuit device includes a conductive region on a substrate and a lower electrode structure including a main electrode part spaced apart from the conductive region and a bridge electrode part between the main electrode part and the conductive region. A dielectric layer contacts an outer sidewall of the main electrode part. To manufacture the integrated circuit device, a preliminary bridge electrode layer is formed in a hole of a mold pattern on the substrate, and the main electrode part is formed on the preliminary bridge electrode layer in the hole. The mold pattern is removed to expose a sidewall of the preliminary bridge electrode layer, and a portion of the preliminary electrode part is removed to form the bridge electrode part. The dielectric layer is formed to contact the outer sidewall of the main electrode part.

Integrated circuit device and method of manufacturing the same

Semiconductor devices are provided. A semiconductor device includes a first portion of a lower electrode structure on a substrate. The semiconductor device includes a first support pattern being in contact with a first portion of a sidewall of the first portion of the lower electrode structure. The semiconductor device includes a second portion of the lower electrode structure on a second portion of the sidewall of the first portion of the lower electrode structure. The semiconductor device includes an upper electrode on the second portion of the lower electrode structure and on the first support pattern. Moreover, the semiconductor device includes a dielectric layer between the upper electrode and the second portion of the lower electrode structure.

A semiconductor device includes a substrate, first and second supporter patterns stacked sequentially on the substrate in a first direction and spaced apart from an upper surface of the substrate, a lower electrode hole that extends through the first and second supporter patterns on the substrate in the first direction, an interface film on side walls and a bottom surface of the lower electrode hole, a lower electrode inside of the lower electrode hole on the interface film, a capacitor dielectric film that is in physical contact with side walls of the interface film, an uppermost surface of the interface film, and an uppermost surface of the lower electrode, the uppermost surface of the interface film is formed on a same plane as an upper surface of the second supporter pattern.

Semiconductor device including an interface film

A method for operating a power transmitting device in a wireless communication system is provided. The method includes receiving feedback information corresponding to power harvest from a plurality of electronic devices, performing beam scheduling based on the feedback information, and transmitting power to the plurality of the electronic devices using at least one beam based on the beam scheduling.

Apparatus and method for transmitting and receiving information and power in wireless communication system

Semiconductor device and method of manufacturing the same

Semiconductor memory device and method of fabricating the same

A signal processing device of a base station being connected to one or more wireless devices of the base station is provided. The signal processing device includes a memory and a processor configured to transmit wireless device setting information to the one or more wireless devices via a front-haul interface during a predetermined time frame, transmit a downlink packet, which is obtained by packetizing downlink baseband data, to the one or more wireless devices via the front-haul interface, receive an uplink packet through the front-haul interface, obtain uplink baseband data and inherent control information by performing uplink packetization on the received uplink packet, and process the uplink baseband data based on analysis of the obtained inherent control information.

Interface device and method in wireless communication network

The transmitting and receiving information and power in a wireless communication system are provided. A transmitting apparatus includes a transceiver, and at least one processor coupled with the transceiver. The at least one processor is configured to generate a symbol including a first set of signals for transferring power and a first information value or a second set of signals for transferring power and a second information value, and transmit the symbol. The first information and the second information may be indicated by a result value determined based on a predefined rule on the basis of a first value acquired by forwardly rectifying the symbol and a second value acquired by reversely rectifying the symbol. Each of the first value and the second value may be determined based on at least one of frequencies, magnitudes, or phases of the signals included in the symbol.

Growing community of inventors

Suwon-si, South Korea

Hyun-Suk Lee