Samsung Electronics Co., Ltd.

Samsung Display Co., Ltd.

Hyun-Suk Kim

Myung-Kwan Ryu

Tae-sang Kim

Kyoung-seok Son

Joon-seok Park

Jong-Baek Seon

Sang-Yoon Lee

Seok-jun Seo

Sun-Jae Kim

Jung-Dal Choi

Joon-Hee Lee

Chang-Hwan Hwang

Seung-Hwan Lee

Ho Joong Lee

Hwa-Sung Rhee

Chi-Young Ahn

Won-Cheol Jeong

Jae-Kwan Park

Sun-Il Shim

Jong-Ho Park

Moon-han Park

Chang-Seok Kang

Jin-Taek Park

Sun-Jung Kim

Kee-jeong Rho

Ueno Tetsuji

Yong-Seok Kim

Jong-Chul Choi

Mi-jeong Song

Sung-Hoi Hur

Sang-Min Kim

Jong-Ho Kim

Hyun-Ju Hong

Seok-Hyun Yoon

Jong-Won Kim

Kwang-Hee Lee

Seung-hyun Lim

Kyung-Bae Park

Jae-Yoon Yoo

Won-mook Choi

Soo-Hong Kim

Won-Jin Kim

Tae-Sang Kim

Young-Gyu Kim

Jung-Young Lee

Seung-Hyun Lim

Jin-Bog Kim

Chang-Won Son

Suk-Joon Son

Sung-cheol Ko

Joon-Seok Park

Hyung-Suk Park

Young-Mo Kang

Soo-Hyun Whang

Woong-Ki Lee

Dae-Bong Lee

Eok-Su Kim

Wan-Joo Maeng

Kyoung-Seok Son

Seok-Jun Seo

Provided is a vertical non-volatile memory device in which a capacitor constituting a peripheral circuit region is formed as a vertical type so that an area occupied by the capacitor in the entire device can be reduced as compared with a planar capacitor. Thus, a non-volatile memory device may be highly integrated and have a high capacity. The device includes a substrate having a cell region and a peripheral circuit region, a memory cell string including a plurality of vertical memory cells formed in the cell region and channel holes formed to penetrate the vertical memory cells in a first direction vertical to the substrate, an insulating layer formed in the peripheral circuit region on the substrates at substantially the same level as an upper surface of the memory cell string, and a plurality of capacitor electrodes formed on the peripheral circuit region to penetrate at least a portion of the insulating layer in the first direction, the plurality of capacitor electrodes extending parallel to the channel holes. The plurality of capacitor electrodes are spaced apart from one another in a second direction parallel to the substrate, and the insulating layer is interposed between a pair of adjacent capacitor electrodes from among the plurality of capacitor electrodes.

Non-volatile memory devices with vertically integrated capacitor electrodes

According to example embodiments, a semiconductor material may include zinc, nitrogen, and fluorine. The semiconductor material may further include oxygen. The semiconductor material may include a compound. For example, the semiconductor material may include zinc fluorooxynitride. The semiconductor material may include zinc oxynitride containing fluorine. The semiconductor material may include zinc fluoronitride. The semiconductor material may be applied as a channel material of a thin film transistor (TFT).

Semiconductor materials, transistors including the same, and electronic devices including transistors

A transistor may include a hole blocking layer between a channel layer including oxynitride and an electrode electrically connected to the channel layer. The hole blocking layer may be disposed in a region between the channel layer and at least one of a source electrode and a drain electrode. The channel layer may include, for example, zinc oxynitride (ZnON). A valence band maximum energy level of the hole blocking layer may be lower than a valence band maximum energy level of the channel layer.

Transistor, method of manufacturing the same, and electronic device including transistor

According to example embodiments, a transistor may include a gate electrode, a gate insulating layer, and a channel layer stacked on each other; and a source electrode and a drain electrode contacting first and second regions of the channel layer, respectively. The channel layer may include metal oxynitride. The first and second regions of the channel layer may be treated with a plasma containing hydrogen, and the first and second regions have a higher carrier concentration than a carrier concentration of a remaining region of the channel layer. The first and second regions of the channel layer may have a lower oxygen concentration and a higher nitrogen concentration than that of the remaining region thereof. The metal oxynitride of the channel layer may include a zinc oxynitride (ZnON)-based semiconductor.

Transistors including a channel where first and second regions have less oxygen concentration than a remaining region of the channel, methods of manufacturing the transistors, and electronic devices including the transistors

A transistor may include a light-blocking layer that blocks light incident on a channel layer. The light-blocking layer may include a carbon-based material. The carbon-based material may include graphene oxide, graphite oxide, graphene or carbon nanotube (CNT). The light-blocking layer may be between a gate and at least one of the channel layer, a source and a drain.

Transistors and electronic devices including the transistors

According to example embodiments, a thin film transistor (TFT) includes a channel layer including zinc, nitrogen, and oxygen; an etch stop layer on the channel layer; source and drain electrodes respectively contacting both ends of the channel layer; a gate electrode corresponding to the channel layer; and a gate insulating layer between the channel layer and the gate electrode. The etch stop layer includes fluorine. The channel layer may be on the gate electrode.

Thin film transistor and method of manufacturing the same

A transistor includes a channel layer including an oxynitride semiconductor doped with at least one of hafnium (Hf) and zirconium (Zr), a source on one side portion of the channel layer and a drain on another side portion of the channel layer, a gate corresponding to the channel layer, and a gate insulation layer between the channel layer and the gate.

Oxynitride channel layer, transistor including the same and method of manufacturing the same

A transistor may include a channel layer formed of an oxide semiconductor. The oxide semiconductor may include GaZnON, and a proportion of Ga content to a total content of Ga and Zn of the channel layer is about 0.5 to about 4.5 at %.

Transistors, methods of manufacturing the same, and electronic devices including transistors

Electrical contact device

Transistors having sulfur-doped zinc oxynitride channel layers, and methods of manufacturing the same, include a ZnON channel layer with sulfur content ratio with respect to a zinc content of from about 0.1 at % to about 1.2 at %, a source electrode and a drain electrode respectively formed on a first region and a second region of the channel layer, a gate electrode corresponding to the channel layer, and a gate insulation layer between the channel layer and the gate electrode.

Transistor having sulfur-doped zinc oxynitride channel layer and method of manufacturing the same

Non-volatile memory devices are provided including a control gate electrode on a substrate; a charge storage insulation layer between the control gate electrode and the substrate; a tunnel insulation layer between the charge storage insulation layer and the substrate; a blocking insulation layer between the charge storage insulation layer and the control gate electrode; and a material layer between the tunnel insulation layer and the blocking insulation layer, the material layer having an energy level constituting a bottom of a potential well.

Non-volatile memory devices

An interconnection structure for a semiconductor device includes an inter-level insulation layer disposed on a semiconductor substrate. First contact constructions penetrate the inter-level insulation layer. Second contact constructions penetrate the inter-level insulation layer. Metal interconnections connect the first contact constructions to the second contact constructions on the inter-level insulation layer. The first contact constructions include first and second plugs stacked in sequence and the second contact constructions include the second plug.

Methods of forming interconnection structures for semiconductor devices

Growing community of inventors

Hwaseong-si, South Korea

Hyun-Suk Kim