Samsung Electronics Co., Ltd.

Semes Co., Ltd.

Solum Co., Ltd.

Hyun-Su Kim

Gil-heyun Choi

Jong-Ho Yun

Eun-Ji Jung

Sug-Woo Jung

Eun-Ok Lee

Sang-Bom Kang

Kwang-Jin Moon

Byung-Hee Kim

Woong-Hee Sohn

Sang-Woo Lee

Jong-ho Yun

Jang-Hee Lee

Ho-Ki Lee

Eun-ji Jung

Seung-Gil Yang

Dae-yong Kim

Hee-Sook Park

Dae-Yong Kim

Kwang-jin Moon

Woong-hee Sohn

Gil-Heyun Choi

Seong-hwee Cheong

Ji-Hyun Kim

Sung-Tae Kim

Ik-Soo Kim

Min-sang Song

Jae-Min Lee

Byung-Hak Lee

Kwan-Jong Roh

Jeong-gil Lee

Sung-Chan Lee

Geun-O Jeong

Young-seung Noh

Jun-kyu Lee

Tae-Jin Jeong

Young-Soo Yun

Soo-Hyeon Lee

Soon-joung Yio

Young-joo Kim

Eun-ok Lee

Seok-Woo Jung

Se-Ran Oh

Seong-Gil Park

The inventive concept relates to a substrate heating unit. The substrate heating unit includes a chuck stage having an inner space defined by a base and sidewalls, a heating unit provided in the inner space of the chuck stage, and a quartz window that covers the inner space of the chuck stage and has an upper surface on which the substrate is placed. The heating unit includes a heating plate having a disk shape with an opening in the center thereof and heating modules installed in respective heating zones on the heating plate that are divided from each other, each heating module having a printed circuit board on which heating light sources emitting light for heating are mounted.

Substrate heating unit and substrate processing apparatus having the same

A load switch circuit includes a charging transistor, a current sensor, a voltage sensor, a selector, a current controller and a mode controller. The charging transistor is connected between a first switch node and a second switch node and controls a charging current in response to a charging control signal. The current sensor is connected to the first switch node and the second switch node and senses the charging current to generate a current sensing signal. The voltage sensor is connected to the first switch node and the second switch node and senses a source-drain voltage of the charging transistor to generate a voltage sensing signal. The selector selects the current sensing signal or the voltage sensing signal in response to a mode signal to generate a selection voltage signal. The current controller compares the selection voltage signal with a reference voltage to generate the charging control signal.

Load switch circuit and method of controlling battery power using the same

The inventive concept relates to a substrate support unit. The substrate support unit includes a chuck stage having an inner space defined by a base surface and sidewalls, a heating unit provided in the inner space, the heating unit including a base plate having a disk shape with an opening in the center and a heat generation part mounted on the base plate and having heating light sources that emit light energy, a quartz window that covers the inner space and has an upper surface on which a substrate is placed, and a reflective member that reflects light energy lost in a lateral direction of the chuck stage toward the substrate.

Substrate support unit and substrate processing apparatus having the same including reflective member configured to reflect light toward substrate

A method of manufacturing a semiconductor device includes forming an etch target layer on a substrate; forming an amorphous metal layer on the etch target layer, the amorphous metal layer comprising nitrogen between 15 atomic percentage (at %) and 25 at %; forming an amorphous metal hardmask by patterning the amorphous metal layer; and etching the etch target layer by using the amorphous metal hardmask as an etching mask.

Method of manufacturing metal hardmask and semiconductor device

Provided herein is a charger with improved radiation function capable of lowering its surface temperature to prevent the surface temperature from increasing excessively, the charger according to one aspect of the present disclosure including a printed circuit board on which circuit elements are mounted; an inner case formed in a hollow case shape of which both surfaces are open, and where the printed circuit board is arranged inside; a radiation member formed to cover an outer surface of the inner case to release heat generated in the circuit elements of the printed circuit board; an outer case formed to encompass the radiation member and provided with one open surface; a cover assembled in the outer case and configured to close the one open surface of the outer case; and a terminal coupled to one surface of the outer case, and configured to enable electricity to be supplied to the charger when inserted into a consent.

Charger with improved heat radiation and the manufacturing method thereof

A method of manufacturing a semiconductor device includes: forming a trench for forming buried type wires by etching a substrate; forming first and second oxidation layers on a bottom of the trench and a wall of the trench, respectively; removing a part of the first oxidation layer and the entire second oxidation layer; and forming the buried type wires on the wall of the trench by performing a silicide process on the wall of the trench from which the second oxidation layer is removed. As a result, the buried type wires are insulated from each other.

Semiconductor device and method of manufacturing the same

Contacts having different characteristics may be created by forming a first silicide layer over a first device region of a substrate, and then forming a second silicide layer over a second device region while simultaneously further forming the first silicide layer. A first contact hole may be formed in a dielectric layer over a first device region of a substrate. A silicide layer may then be formed in the first contact hole. A second contact hole may be formed after the first contact hole and silicide layer is formed. A second silicidation may then be performed in the first and second contact holes.

Method for forming silicide contacts

Provided are an identifying method and an apparatus for identifying a plurality of JAVA&#x2122; PUSH request terminals using Bluetooth&#xae; communication in a mobile communication terminal. According to the method, acquiring information records for performing JAVA&#x2122; PUSH about a plurality of terminals by requesting a service search through a Logical Link Control and Adaption Protocol (L2CAP) connection between the mobile communication terminal and the plurality of JAVA&#x2122; PUSH request terminals and displaying unique identification information of the plurality of JAVA&#x2122; PUSH request terminals by checking the information records of the plurality of JAVA&#x2122; PUSH request terminals.

Method and apparatus for identifying JAVA PUSH request equipments using bluetooth in a mobile communication terminal

A method of forming a semiconductor device may include forming an interlayer insulating layer on a semiconductor substrate, and the interlayer insulating layer may have a contact hole therein exposing a portion of the semiconductor substrate. A single crystal semiconductor plug may be formed in the contact hole and on portions of the interlayer insulating layer adjacent the contact hole opposite the semiconductor substrate, and portions of the interlayer insulating layer opposite the semiconductor substrate may be free of the single crystal semiconductor plug. Portions of the single crystal semiconductor plug in the contact hole may be removed while maintaining portions of the single crystal semiconductor plug on portions of the interlayer insulating layer adjacent the contact hole as a single crystal semiconductor contact pattern. After removing portions of the single crystal semiconductor plug, a single crystal semiconductor layer may be formed on the interlayer insulating layer and on the single crystal semiconductor contact pattern. A second interlayer insulating layer may be formed on the single crystal semiconductor layer, and a common contact hole may be formed through the second interlayer insulating layer, through the single crystal semiconductor layer, and through the first interlayer insulating layer to expose a portion of semiconductor substrate. In addition, a conductive contact plug may be formed in the common contact hole in contact with the semiconductor substrate. Related devices are also discussed.

Semiconductor devices having stacked structures

A plurality of spaced-apart conductor structures is formed on a semiconductor substrate, each of the conductor structures including a conductive layer. Insulating spacers are formed on sidewalls of the conductor structures. An interlayer-insulating film that fills gaps between adjacent ones of the insulating spacers is formed. Portions of the interlayer-insulating layer are removed to expose upper surfaces of the conductive layers. Respective epilayers are grown on the respective exposed upper surfaces of the conductive layers and respective metal silicide layers are formed from the respective epilayers.

Methods for forming silicide conductors using substrate masking

A method of forming an ohmic contact layer including forming an insulation layer pattern on a substrate, the insulation pattern layer having an opening selectively exposing a silicon bearing layer, forming a metal layer on the exposed silicon bearing layer using an electrode-less plating process, and forming a metal silicide layer from the silicon bearing layer and the metal layer using a silicidation process. Also, a method of forming metal wiring in a semiconductor device using the foregoing method of forming an ohmic contact layer.

Method forming ohmic contact layer and metal wiring in semiconductor device

A semiconductor device includes a plurality of channel structures on a semiconductor substrate. A bit line groove having opposing sidewalls is defined between sidewalls of adjacent ones of the plurality of channel structures. A plurality of bit lines are formed on corresponding ones of the opposing sidewalls, and the plurality of bit lines are electrically isolated from each other

Semiconductor devices including buried bit lines

There is provided a method of forming a semiconductor device having stacked transistors. When forming a contact hole for connecting the stacked transistors to each other, ohmic layers on the bottom and the sidewall of the common contact hole are separately formed. As a result, the respective ohmic layers are optimally formed to meet requirements or conditions. Accordingly, the contact resistance of the common contact may be minimized so that it is possible to enhance the speed of the semiconductor device.

Method of forming semiconductor device having stacked transistors

A method of forming a buried interconnection includes removing a semiconductor substrate to form a groove in the semiconductor substrate. A metal layer is formed on inner walls of the groove using an electroless deposition technique. A silicidation process is applied to the substrate having the metal layer, thereby forming a metal silicide layer on the inner walls of the groove.

Methods of forming a semiconductor device including buried bit line

A stacked semiconductor device comprises a lower transistor formed on a semiconductor substrate, a lower interlevel insulation film formed on the semiconductor substrate over the lower transistor, an upper transistor formed on the lower interlayer insulation film over the lower transistor, and an upper interlevel insulation film formed on the lower interlevel insulation film over the upper transistor. The stacked semiconductor device further comprises a contact plug connected between a drain or source region of the lower transistor and a source or drain region of the upper transistor, and an extension layer connected to a lateral face of the source or drain region of the upper transistor to enlarge an area of contact between the source or drain region of the upper transistor and a side of the contact plug.

Stacked semiconductor device and method of fabrication

Growing community of inventors

Gyeonggi-do, South Korea

Hyun-Su Kim