Samsung Electronics Co., Ltd.

Samsung Sdi Co., Inc.

Samsung Electro-mechanics Co., Ltd.

Hyun-Seok Choi

Hyung-Mo Hwang

Hyung Jun Kim

Myung Sup Jung

Yong-Hyun Kim

Sang Ah Gam

Jung-Chan Cho

Hyo-Jae Bang

Dong-Woo Shin

Young-Chul Park

Hye Young Kong

Sangah Gam

Jin-San Jung

Yong-jin Kim

Ju Hyun Kim

Beom Seok Kim

Young-ho Lee

Jung-Hyeon Kim

Do-hyung Kim

Seong-Chan Han

Dong-chun Lee

Kyoung-Sun Kim

Su-Yong An

Kwang-Su Yu

Joo-han Lee

Seong-Jun Yoon

Yang-Je Lee

Sin-Yeob Lee

Sun-Woo Kim

Sang-min Bae

Jae-Sang Baik

Si-Suk Kim

In a method of manufacturing an electronic device, a solder paste is coated on a substrate pad of a substrate. An electronic product is disposed on the substrate such that a solder on an input/output pad of the electronic product makes contact with the solder paste. A first microwave is generated toward the solder paste during a reflow stage to heat the solder paste. A phase of the first microwave is changed during the reflow stage. Heating of the solder paste causes the solder to reflow, thereby forming a solder bump between the substrate pad and the input/output pad.

Solder reflow apparatus and method of manufacturing an electronic device

A liquid crystal display includes a lower substrate and an upper substrate facing each other, a liquid crystal layer disposed between the lower substrate and the upper substrate, a color conversion layer disposed on the liquid crystal layer, a first polarizing layer and a first phase difference layer disposed between the liquid crystal layer and the color conversion layer, and a second polarizing layer and a second phase difference layer disposed between a light source and the lower substrate, wherein the first phase difference layer has a refractive index satisfying Inequality 1 and the second phase difference layer has refractive indexes satisfying Inequality 2.&#x2003;&#x2003;[Inequality 1]&#x2003;&#x2003;[Inequality 2]In Inequalities 1 and 2, n, n, n, n, n, and nare the same in the detailed description.

Liquid crystal display with in-cell phase difference layer

A compensation film includes a first retardation layer including a polymer having negative birefringence, and a second retardation layer including a liquid crystal having positive birefringence, where the first retardation layer has an in-plane retardation (R) of 320 nm to 1050 nm for incident light having wavelength of 550 nm, the second retardation layer has an in-plane retardation (R) of 180 nm to 910 nm for the incident light, an entire in-plane retardation (R) of the first and second retardation layers for the incident light is a difference between the in-plane retardations of the first and second retardation layers, an angle between slow axes of the first and second retardation layers is 85 to 95 degrees, and the entire in-plane retardation (R) of the first and second retardation layers for the wavelength of 450 nm, 550 nm and 650 nm satisfies R(450 nm)&#x3c;R(550 nm)&#x3c;R(650 nm).

Compensation film and optical film and display device

An optical film includes a polarization film including a polymer resin and a dichroic dye, and a phase delay layer disposed on the polarization film and including a liquid crystal.

Optical film, manufacturing method thereof, and display device

A polarization film includes a polarization layer including a polymer and a dichroic dye having a maximum absorption wavelength (&#x3bb;) at about 380 nm to about 780 nm, and a protective layer disposed on a surface of the polarization layer and having a cross-linking structure.

Polarization film, antireflection film, and display device

A compensation film includes: a first retardation layer including a polymer; a second retardation layer including a liquid crystal having positive birefringence; and a compensation layer including a liquid crystal having a vertical alignment property, where an angle between slow axes of the first and second retardation layers is in a range of about 85 to about 95 degrees, an entire in-plane retardation (R) of the first retardation layer, the second retardation layer and the compensation layer for wavelengths of 450 nm, 550 nm and 650 nm satisfy the following inequation: R(450 nm)&#x3c;R(550 nm)&#x3c;R(650 nm), an in-plane retardation (R) of the compensation layer for the incident light having a wavelength of about 550 nm is in a range of about zero to about 50 nm, and a thickness direction retardation (R) of the compensation layer for the incident light is less than zero.

Compensation film and optical film, and display device

A printed circuit board (PCB) prevents damage to tabs of the PCB and pins of a slot by reducing insertion force when the PCB is inserted in the slot. The PCB includes a body portion including a first surface and a second surface and a metal interconnection layer formed on at least one of the first and second surfaces. The metal interconnecting layer includes tabs formed along a first edge of the body portion. An insertion force alleviation portion in which at least a portion of the body portion is removed is formed in the first edge to reduce the insertion force required to seat the PCB within the slot.

Slot-mounted printed circuit board having small insertion force

A memory module may include a module substrate having a side portion. The side portion may be adapted or configured to be inserted into a socket of a main board. A plurality of connection pads may be arranged along the side portion. The connection pads may have a step portion of a first height from a surface of the side portion and a contact portion of a second height that is greater than the first height from the surface of the side portion. At least one semiconductor package may be mounted on the module substrate and electrically connected to the connection pads.

Memory module and method of manufacturing a memory module

Provided may be a semiconductor resistance element including resistance patterns disposed on an insulating substrate. The substrate may have first and second planar surfaces disposed in a first direction, third and fourth planar surfaces at least between the first and second planar surfaces in a second direction and fifth and sixth planar surfaces at least between the first and second planar surfaces in a third direction. The semiconductor resistance element may include a first resistance pattern configured to cover a selected one of the first and second planar surfaces and a second resistance pattern on at least one of the third through sixth planar surfaces.

Semiconductor resistance element, semiconductor module including the same, and processor-based system including the semiconductor module

Provided may be a semiconductor resistance element including resistance patterns disposed on an insulating substrate. The substrate may have first and second planer surfaces disposed in a first direction, third and fourth planar surfaces at least between the first and second planar surfaces in a second direction and fifth and sixth planar surfaces at least between the first and second planar surfaces in a third direction. The semiconductor resistance element may include a first resistance pattern configured to cover a selected one of the first and second planar surfaces and a second resistance pattern on at least one of the third through sixth planar surfaces.

A semiconductor memory module includes a printed circuit board (PCB) including a rigid PCB part and a flexible PCB part including an overlap portion, a non-overlap portion, and memory components mounted on the PCB. The rigid PCB part includes a first surface and a second surface facing the first surface. The overlap portion of the flexible PCB part overlaps the rigid PCB part, and the non-overlap portion does not overlap the rigid PCB part. The flexible PCB part may include an overlap stacked structure including at least one doubling portion.

Printed circuit board and semiconductor memory module using the same

A printed circuit board, a memory module having the same, and a fabrication method thereof. The printed circuit board includes an interconnection substrate on which electronic components are mounted and in which a plurality of signal lines are arranged. The signal lines are electrically coupled to the electronic components. A heat sink is disposed on one surface of the interconnection substrate to dissipate heat of the electronic components, and in which no signal lines are arranged. The printed circuit board includes a bending substrate coupling the interconnection substrate to the heat sink, and formed of a flexible material configured to be bent.

Printed circuit board, memory module having the same and fabrication method thereof

A semiconductor memory module having a reverse mounted chip resistor, and a method of fabricating the same are provided. By reverse mounting the chip resistor on the semiconductor memory module, the resistive material is protected, thereby preventing open circuits caused by damage to the resistive material. Also, a chip-resistor connection pad of a module substrate is formed to extend higher from the module substrate than other connection pads connected to other elements. Thus, the resistive material of the chip resistor does not contact the module substrate, thereby preventing poor alignment and defective connections.

Semiconductor memory module with reverse mounted chip resistor

A stacked semiconductor module, a method of fabricating the same, and an electronic system using the module are provided. A first semiconductor module having a plurality of semiconductor devices mounted on a rigid printed circuit board (PCB) and a second semiconductor module having a plurality of other semiconductor devices mounted on a flexible PCB are provided. On the rigid PCB a number L of first tabs may be disposed on a first surface, and a number K of second tabs may be disposed on a second surface of the rigid PCB. The flexible PCB may have a number M of third tabs on a third surface, and a number N of fourth tabs on a fourth surface of the flexible PCB. The second tabs may be combined with the third tabs using a conductive adhesive. The third tabs may be electrically connected to corresponding ones of the second tabs.

Growing community of inventors

Asan-si, South Korea

Hyun-Seok Choi