Samsung Electronics Co., Ltd.

Hyundai Motor Company

Kia Motors Corporation

Hyun-ki Kim

In-oh Hwang

Joo-Ho Kim

Du-seop Yoon

Ji-Young Kim

Jung-Hwa Lee

Seung-hwan Kim

Yong-kwan Lee

Nak-hyun Kim

Sang-soo Kim

Jun-young Oh

Hyun Yeul Lee

Chong-sam Chung

Sang-min Lee

Yong-hwan Kwon

Jung-hyun Shim

Yong-hoon Kim

Chang-min Park

Kiu-hae Jung

Jin-Kyung Lee

Nho-Kyung Hong

Myong-do Ro

Je-Min Ryu

Eun-kyung Yoo

Kil-soo Kim

Seung-Hyun Hong

Kyung-suk Oh

Hyun-Ki Jung

Joo-ho Kim

Jae-Min Moon

Chi-yul Yoon

Dong-Hwi Kim

Min-Woo Kang

Kwan-joon Kim

Hyung-Sik You

Ji-sun Hong

Su-jung Hyung

Whee-Jin Kwon

Soon-Woo Kwon

Chung-An Lee

Seong-hyun Jang

Jin-gyu Kim

Jong-won Park

Du-seep Yoon

Yang-gyoon Loh

Yoon-jae Jeong

Hiroshi Awata

A semiconductor package includes a package substrate, at least one semiconductor chip mounted on the package substrate, and a molding member that surrounds the at least one semiconductor chip. The molding member includes fillers. Each of the fillers includes a core and a coating layer that surrounds the core. The core includes a non-electromagnetic material and the coating layer includes an electromagnetic material. The molding member includes regions respectively have different distributions of the fillers.

Semiconductor package and method of manufacturing the same

A heat treatment method of a component for a vehicle includes: heating an inner space of a heat treatment furnace in which a component for a vehicle is disposed in the inner space; stabilizing hydrogen (H) by injecting the Hinto the inner space; and performing nitrification heat treatment for the component by injecting only ammonia (NH) into the inner space after the stabilizing. The heat treatment method may adjust the degree of vacuum and the flow rate instead of a Kn without additionally injecting the Hgas into an NHgas, thereby implementing the nitrification heat treatment of a quality similar to that of a conventional nitrification heat treatment for a short time.

Heat treatment method for a vehicle component

A semiconductor package includes a package substrate, a lower semiconductor chip on the package substrate, a heat emission member on the lower semiconductor chip, the heat emission member having a horizontal unit and a vertical unit connected to the horizontal unit, a first semiconductor chip stack and a second semiconductor chip stack on the horizontal unit, and a molding member that surrounds the lower semiconductor chip, the first and second semiconductor chip stacks, and the heat emission member. The vertical unit may be arranged between the first semiconductor chip stack and the second semiconductor chip stack, and an upper surface of the vertical unit may be exposed in the molding member.

Semiconductor package

Provided is a semiconductor device including chip identification (ID) generation circuits. The semiconductor device may be a multi-chip package including a plurality of memory chips, and each of the memory chips includes a chip ID generation circuit configured to selectively modify a chip ID of a corresponding memory chip. The chip ID generation circuit determines the chip ID of the memory chip by testing the chip ID of the memory chip by using a mode register, and selectively programs the chip ID of the memory chip by using at least two fuse sets. The chip ID generation circuit may block an output of the chip ID of the memory chip when the memory chip is determined as a defective chip or is selected to stop its use.

Semiconductor device having chip ID generation circuit

A video display apparatus includes a display configured to reproduce a video, a processor configured to generate a signal for applying an electrical stimulus to a user, based on a motion depicted in the video, and a communication unit configured to transmit the signal to an electrical stimulation apparatus.

Video display apparatus and method for reducing VR sickness

Provided are a printed circuit board (PCB) capable of blocking introduction of impurities during a molding process so as to reduce damage on a semiconductor package, a method of manufacturing the PCB, and a method of manufacturing a semiconductor package by using the PCB. An embodiment includes an apparatus comprising: a substrate body comprising an active area and a dummy area on an outer portion of the active area, the substrate body extending lengthwise in a first direction; a plurality of semiconductor units mounted on the active area; and a barrier formed on the dummy area, wherein the barrier extends in the first direction.

Printed circuit board (PCB), method of manufacturing the PCB, and method of manufacturing semiconductor package using the PCB

A refrigerator includes a handgrip arranged on one side of a door to open and close a storage compartments, a measurer configured to measure fingerprints and body composition of a user when the user grabs the handgrip, a display configured to display the measured body composition information, and a controller configured to recognize the user based on the measured fingerprints and store the measured body composition information as information regarding the recognized user.

Refrigerator and method for measuring body composition using the refrigerator

A controlling method for arranging a content list of a display apparatus is provided. The method includes storing at least one content selected by a user, displaying a content list including the at least one content, and in response to a location fixation command related to one of the at least one content included in the content list being input, fixing a location of the selected at least one content on the content list. Accordingly, the content list can be arranged efficiently.

Display apparatus for arranging content list and controlling method thereof

A method of operating a memory device may include: providing a first power supply voltage to a sense amplifier during a first time interval, the first time interval being between a first time at which a voltage is provided to a first bit line, and a second time at which a pre-charge command is received; and providing a second power supply voltage to the sense amplifier during a second time interval, during which the word line is enabled after the pre-charge command is received. The second power supply voltage may be greater than the first power supply voltage.

Method of operating memory device and refresh method of the same

A semiconductor memory device may include a memory cell array, a plurality of first sub word line drivers, and a plurality of second sub word line drivers. The memory cell array may comprise a plurality of sub cell arrays, a plurality of first word lines and a plurality of second word lines, wherein a loading of each of the first word lines is greater than a loading of each of the second word lines. Each of the plurality of first sub word line drivers may be connected to drive a corresponding one of the plurality of first word lines, wherein each of the first sub word line drivers has a first driving capability. Each of the plurality of second sub word line drivers may be connected to drive a corresponding one of the plurality of second word lines, wherein each of the second sub word line drivers has a second driving capability different from the first driving capability.

Semiconductor memory device having sub word line driver and driving method thereof

A method of providing a graphical user interface (GUI) and a multimedia apparatus using the same are provided, the method including: dividing a list display area into a plurality of sub-areas; and displaying a plurality of related lists regarding the multimedia content on the plurality of sub-areas, respectively. Accordingly, a plurality of related lists are displayed on a plurality of divided areas, and the scroll directions of the lists are independently decided according to each area. Therefore, a user can find desired content with greater convenience.

Method for providing GUI to display a plurality of lists and multimedia apparatus using the same

Example embodiments relate to a semiconductor memory device that includes an address coding method for a multi-word line test, for example, an address coding method to test a semiconductor memory device having a cell block row selection circuit. The semiconductor memory device may include a plurality of memory cell blocks, where each memory cell block may include memory cells coupled to a bit line. The method may include coding row addresses of the memory cell block by dividing one or more row addresses corresponding to cell blocks of the memory cell block to create sub-cell blocks and adding the sub-cell blocs into the main cell blocks to create a logical memory block, which enables word lines of the main cell blocks and sub-cell blocks at the same time.

Semiconductor memory device that includes an address coding method for a multi-word line test

A semiconductor device having a decoupling capacitor and a method of fabricating the same are provided. The semiconductor device includes a semiconductor substrate having a cell region, a first peripheral circuit region, and a second peripheral circuit region. At least one channel trench is disposed in the cell region of the semiconductor substrate. At least one first capacitor trench is disposed in the first peripheral circuit region of the semiconductor substrate, and at least one second capacitor trench is disposed in the second peripheral circuit region of the semiconductor substrate. A gate electrode is disposed in the cell region of the semiconductor substrate and fills the channel trench. A first upper electrode is disposed in the first peripheral circuit region of the semiconductor substrate and fills at least the first capacitor trench. A second upper electrode is disposed in the second peripheral circuit region of the semiconductor substrate and fills at least the second capacitor trench. A gate dielectric layer is interposed between the channel trench and the gate electrode. A first dielectric layer is interposed between the semiconductor substrate of the first peripheral circuit region having the first capacitor trench and the first upper electrode and has the same thickness as the gate dielectric layer. A second dielectric layer is interposed between the semiconductor substrate of the second peripheral circuit region having the second capacitor trench and the second upper electrode and has a different thickness from the first dielectric layer.

Semiconductor device having decoupling capacitor and method of fabricating the same

A data reproducing method reproducing data recorded in a super resolution information storage medium in a form of marks having magnitudes less than a resolving power of an incident light beam, and an apparatus thereof. The data reproducing method includes irradiating a first beam having a resolving power causing a super resolution phenomenon and a second beam having a resolving power not causing a super resolution phenomenon into different places on the information storage medium, detecting a first reproduction signal based on the first beam and a second reproduction signal based on the second beam, and compensating for and calculating a temporal delay between the first reproduction signal and the second reproduction signal. Therefore, a signal reflected from a peripheral area of a reproduction beam spot other than a super resolution area can be excluded, thereby improving reproduction signal characteristics.

Method and apparatus for reproducing data of super resolution information storage medium

Growing community of inventors

Hwaseong-si, South Korea

Hyun-ki Kim