Samsung Display Co., Ltd.

Other

Tiumbio Co., Ltd.

Candleflower Co., Ltd.

Hyun-Jung Lee

Ki-Won Kim

Woo-Geun Lee

Ji-Soo Oh

Young-Wook Lee

Kap-Soo Yoon

Hee-Jun Byeon

Do-Hyun Kim

Jin-Won Lee

Sung-Haeng Cho

Ji-Yun Hong

Jang-Hoon Ha

Sung-Hoon Yang

Hak-ju Lee

Bong-Kyun Kim

Yeong-Keun Kwon

Seung Jin Lee

Hye-Young Ryu

Kap Soo Yoon

Myoung-Ha Jeon

Woo Geun Lee

Jae-Sun Kim

Ju Young Lee

Bong-Yong Lee

Sijin Kim

Hun-Taek Kim

Je Ho Ryu

Keun-Ho Ryu

Moon-Keun Choi

Yeun-Mo Yeon

Seungjoo Choi

Sang-hwan Kang

Jaeseung Ahn

Young Ah Shin

Yong-Hyuk Kim

Dong-Chul Shin

Euisun Park

Kang-Hoon Je

Sun Li Bang

Jeong Kon Seo

Yeontaek Jeong

Hoechul Jung

A substrate including a first signal line and a first electrode disposed on the substrate, an oxide semiconductor layer pattern overlapping the first electrode, an insulating layer disposed between the first electrode and the oxide semiconductor layer pattern, a second signal line intersecting the first signal line, a second electrode electrically connected to the oxide semiconductor layer pattern, a third electrode electrically connected to the oxide semiconductor layer pattern and spaced apart from the second electrode, and an insulator comprising a first portion disposed between the first signal line and the second signal line, and at least partially overlapping with both of the first signal line and the second signal line.

Thin film transistor array substrate and manufacturing method thereof

A substrate including a gate line and a first electrode disposed on the substrate, an oxide semiconductor layer pattern overlapping the first electrode, an insulating layer disposed between the first electrode and the oxide semiconductor layer pattern, a data line intersecting the gate line, a second electrode electrically connected to the oxide semiconductor layer pattern, a third electrode electrically connected to the oxide semiconductor layer, the third electrode spaced apart from the second electrode, and an insulating pattern including a first portion which is disposed between the gate line and the data line and at least partially overlaps with both of the gate line and the data line.

A circulator for a cooling mat, whereby water is brought into contact with a frozen refrigerant, cooled thereby, and then circulated through a pipe of the mat. A cooling effect can be provided to a user in contact with the mat by using the circulator having a simple structure.

Circulator for cooling mat

A substrate including a gate line and a gate electrode disposed on a substrate, an oxide semiconductor layer pattern overlapping the gate electrode, a gate insulating layer disposed between the gate electrode and the oxide semiconductor layer pattern, a data line intersecting the gate line, a source electrode electrically connected to the oxide semiconductor layer pattern, a drain electrode electrically connected to the oxide semiconductor layer, the drain electrode spaced apart from the source electrode, and an insulating pattern including a first portion, which is disposed between the gate line and the data line and at least partially overlaps with both of the gate line and the data line.

A display substrate includes a base substrate, a switching element disposed on the base substrate a first layer disposed on the switching element, a first electrode disposed on the first layer, an insulation layer disposed on the first electrode, and a spacer disposed on the contact hole of the insulation layer. The switching element includes a gate electrode, a source electrode, and a drain electrode. A contact hole is defined in the insulation layer to partially exposing expose a portion of the first electrode.

Display substrate and method of manufacturing the same

A display substrate is provided. The display substrate includes a gate interconnection disposed on an insulating substrate, an oxide semiconductor pattern disposed on the gate interconnection and including an oxide semiconductor, and a data interconnection disposed on the oxide semiconductor pattern to interconnect the gate interconnection. The oxide semiconductor pattern includes a first oxide semiconductor pattern having a first oxide and a first element and a second oxide semiconductor pattern having a second oxide.

Display substrate including thin film transistors having a multilayered oxide semiconductor pattern

A substrate including gate wirings including a gate line and a gate electrode disposed on a substrate, an oxide semiconductor layer pattern overlapping the gate electrode, a gate insulating layer disposed between the gate wirings and the oxide semiconductor layer pattern, data wirings including a data line crossing the gate line, a source electrode connected to one side of the oxide semiconductor layer pattern, and a drain electrode connected to another side of the oxide semiconductor layer, and an insulating pattern including a first portion which is disposed between the gate line and the data line and at least partially overlaps with both of the gate line and the data line.

The present invention provides a novel 2-pyridyl substituted imidazole derivative, or a pharmaceutically acceptable salt or solvate thereof, which selectively inhibits the transforming growth factor-&#x3b2; (TGF-&#x3b2;) type I receptor (ALK5) and/or the activin type I receptor (ALK4); a pharmaceutical composition comprising same as an active ingredient; and a use of the 2-pyridyl substituted imidazole derivative for the manufacture of a medicament for preventing or treating a disease mediated by ALK5 and/or ALK4 receptors in a mammal.

2-pyridyl substituted imidazoles as ALK5 and/or ALK4 inhibitors

A substrate including gate wirings including gate line and a gate electrode disposed on the substrate, a storage line disposed on the same layer as the gate wirings, a gate insulating layer disposed on the gate wirings and the storage line, an oxide semiconductor layer pattern disposed on the gate insulating layer, data wirings including a data line crossing the gate line, a source electrode disposed on one side of the oxide semiconductor layer pattern, and a drain electrode disposed on another side of the oxide semiconductor layer, and an etch stopper including a first etch stopper portion disposed between the storage line and the data line and partially overlapping both the data line and the storage line.

A Thin Film Transistor (TFT) includes a substrate, a semiconductor layer disposed on the substrate a first source electrode and a first drain electrode spaced apart from each other on the semiconductor layer, a channel area disposed in the semiconductor layer between the first source electrode and the first drain electrode, an etching prevention layer disposed on the channel area, the first source electrode, and the first drain electrode and a second source electrode in contact with the first source electrode, and a second drain electrode in contact with the first drain electrode.

Thin film transistor, thin film transistor panel, and method for manufacturing the same

A method of manufacturing a thin film transistor (TFT) array substrate includes forming a gate line and a gate electrode on a substrate, forming a gate-insulating layer and an oxide semiconductor layer on the gate line and the gate electrode, forming etch stop patterns at a thin-film transistor area and an area where the gate line and the data line overlap each other, forming a data conductor on the oxide semiconductor layer and the etch stop patterns, the data conductor comprising a source electrode and a drain electrode that constitute a TFT together with the gate electrode, and forming a data line extending in a direction intersecting the gate line.

Display substrate

A thin film transistor (TFT) array substrate and a manufacturing method thereof are provided. The TFT array substrate may include a gate line disposed on a substrate and including a gate line and a gate electrode, an oxide semiconductor layer pattern disposed on the gate electrode, a data line disposed on the oxide semiconductor layer pattern and including a source electrode and a drain electrode of a thin film transistor (TFT) together with the gate electrode, and a data line extending in a direction intersecting the gate line, and etch stop patterns disposed at an area where the TFT is formed between the source/drain electrodes and the oxide semiconductor layer pattern and at an area where the gate line and the data line overlap each other between the gate line and the data line.

A thin film transistor array panel includes: a gate electrode disposed on an insulation substrate; a gate insulating layer disposed on the gate electrode; a first electrode and an oxide semiconductor disposed directly on the gate insulating layer; a source electrode and a drain electrode formed on the oxide semiconductor; a passivation layer disposed on the first electrode, the source electrode, and the drain electrode; and a second electrode disposed on the passivation layer.

Thin film transistor array panel and manufacturing method thereof

Growing community of inventors

Yangju-si, South Korea

Hyun-Jung Lee