Ethertronics, Inc.

Lg Display Co., Ltd.

Kyocera Avx Components (san Diego), Inc.

Hyun Jun Hong

Tae Wook Kim

Sung Jun Kim

Cheong Ho Ryu

Young Sang Kim

Seung Hyuk Choi

Joo Soo Lim

Chang Bin Lee

A method of forming a multi-layer circuit on a curved substrate includes forming, by a laser direct structuring process, a first layer of the multi-layer circuit on a first surface of the curved substrate. The method includes applying a first layer of paint to the first layer of the multi-layer circuit. The method includes forming, by the laser direct structuring process, a second layer of the multi-layer circuit on the first layer of the paint and electrically coupled to the first layer of the multi-layer circuit. The method includes applying a second layer of paint over the second layer of the multi-layer circuit and forming, by the laser direct structuring process, a third layer of the multi-layer circuit on the second layer of the paint and electrically coupled to the second layer of the multi-layer circuit.

Method for manufacturing a circuit having a lamination layer using laser direct structuring process

The present disclosure relates to the method of manufacturing circuit having lamination layer using LDS (Laser Direct Structuring) to ease the application on surface structure for applied product of various electronic circuit and particularly, in which can form circuit structure of single-layer to multiple-layer on the surface of injection-molded substrate in the shape of plane or curved surface, metal product, glasses, ceramic, rubber or other material.

The present subject matter relates to the method of manufacturing circuit having lamination layer using LDS (Laser Direct Structuring) to ease the application on surface structure for applied product of various electronic circuit and particularly, in which can form circuit structure of single-layer to multiple-layer on the surface of injection-molded substrate in the shape of plane or curved surface, metal product, glasses, ceramic, rubber or other material.

A thin film transistor (TFT) array substrate and a method of manufacturing the same that is capable of decreasing the number of usage of exposure masks to reduce the process time and the process costs and excessively etching a passivation film below a photoresist pattern to easily perform a lift-off process of the photoresist pattern are disclosed. The TFT array substrate includes a gate line layer including a gate line formed on a substrate, a gate electrode diverging from the gate line, and a gate pad formed at the end of the gate line, a gate insulation film formed on the gate line layer, a semiconductor layer formed on the gate insulation film above the gate electrode, a data line layer including a data line intersecting the gate line, source and drain electrodes formed at opposite sides of the semiconductor layer, and a data pad formed at the end of the data line, a pixel electrode contacting the drain electrode, first and second oxidation preventing films contacting the gate pad and the data pad, and an at least two-layered passivation film deposited on the data line layer. The uppermost layer of the at least two-layered passivation film is formed at the remaining region excluding a region where the pixel electrode and the first and second oxidation preventing films are formed.

Growing community of inventors

Gyeonggi-do, South Korea

Hyun Jun Hong