Hynix Semiconductor Inc.

Skhynix Inc.

Lg Semicon Co., Ltd.

Hyun Jo Yang

Dong Sook Chang

Byung Chan Kim

A semiconductor device includes first pads having centers offset in a first direction, wherein the first pads are arranged in a second direction crossing the first direction; second pads separated in the first direction from the first pads and arranged in the second direction, wherein centers of the second pads are offset in the first direction; first gate lines coupled to the first pads, respectively; and second gate lines coupled to the second pads, respectively.

Semiconductor device, memory system and method of manufacturing the semiconductor device

A method for forming patterns on a wafer includes forming a fence having a sloped face in an edge portion of the wafer. The sloped face is direct to an inside of the wafer. A first photoresist layer is formed which extends to cover the fence on the wafer. First photoresist patterns are formed by performing a first exposure and development on the first photoresist layer. An etch process is performed using the first photoresist patterns and the fence as an etch mask. The fence is formed by selectively exposing a negative resist using a light shielding blade, and at this time, the first photoresist layer is formed including a positive resist.

Method for fabricating patterns on a wafer through an exposure process

Provided is a method for verifying a pattern of a semiconductor device. In the method, a designed layout of target patterns is provided, and transferring the designed layout on a wafer to form wafer patterns. Wafer patterns image contour is obtain. The image contour for wafer patterns on the designed layout are matched, After edge differences between the designed layout and the wafer patterns image contour are extracted, a checking layout for detecting wafer pattern defects is obtain by adding the edge differences on the designed layout. Defects on the checking layout is identified to verify the patterns in view of processes before fabrication of a photomask.

Method for verifying mask pattern of semiconductor device

A method for fabricating a fine pattern includes forming a first photomask including first light transmission regions set in a line shape over a first phase shift mask (PSM) region and a first binary mask (BM) region adjacent to the first phase shift mask region. A second photomask may be formed to include second light transmission regions set in a line shape over a second phase shift mask region and a second binary mask region adjacent to the second phase shift mask region, wherein the second light transmission regions intersect the first light transmission regions. A resist layer may first be exposed using the first photomask and secondly exposed using the second photomask. The first and secondly exposed resist layer may be developed to form resist patterns with open regions corresponding to portions where the first light transmission regions intersect the second light transmission regions.

Method for fabricating fine pattern

Disclosed is a photomask for forming a contact hole arranged on a wafer in a zigzag form along a transverse direction, including: a light transmitting substrate; a main pattern disposed on the light transmitting substrate with a zigzag form as an upper main pattern disposed in a relatively upper portion and a lower main pattern disposed in a relatively lower portion are arranged alternately along a transverse direction; a first lower auxiliary pattern extending in a vertical direction and disposed adjacently to a lower portion of the upper main pattern; a first upper auxiliary pattern extending in a vertical direction and disposed adjacently to an upper portion of the lower main pattern; a second lower auxiliary pattern extending in the transverse direction and connecting the first lower auxiliary patterns with each other; and a second upper auxiliary pattern extending in the transverse direction and connecting the first upper auxiliary patterns with each other.

Photomask for forming contact hole in semiconductor device

A method for forming patterns using a single mask includes: disposing a photo mask having a defined pattern, and performing an exposure process by controlling the focal length of an exposure apparatus to a focusing position to form a pattern having the same shape as the photo mask on the wafer; and using the same photo mask, and performing the exposure process by controlling the focal length of the exposure apparatus to a defocusing position to form a reverse pattern having a reversed image with respect to the pattern on the wafer.

Method for forming patterns using single mask

An exposure apparatus includes an exposure light source generating light to be emitted to photomask, a projection lens for projecting the light having passed through the photomask to wafer, and a transmittance adjustment filter in projection lens the transmittance adjustment filter varies the transmittance of the light projected into the projection lens as a function of position in the projection lens.

Exposure apparatus having the same ID bias

A halftone phase shift mask includes a substrate, a first light-shielding layer formed in one region of the substrate for shielding light between a plurality of key patterns, and a second light-shielding layer formed in another region of the substrate for shielding light between a plurality of cell patterns, whereby a generation of sidelobe is prevented. A method of manufacturing a phase shift mask includes forming a first light-shielding layer on one region of a substrate, forming a second light-shielding layer on another region of the substrate and on the first light-shielding layer, and patterning the first and second light-shielding layers to thereby form a plurality of cell patterns and key patterns.

Growing community of inventors

Cheongju-si, South Korea

Hyun Jo Yang