Samsung Electronics Co., Ltd.

Samsung Sdi Co., Inc.

Samsung Sds Co., Ltd.

Snu Rdb Foundation

Agency for Defense Development

Hyun-Jin Choi

Kyung-im Jung

Myung-June Jung

Ji-Soo Kim

Hyun-Jae Lee

Jae-Hyuck Shin

Chan-ik Park

Ju-Dong Kim

Bong-Kyu Hwang

Sang-ho Yi

Jae-Woong Yun

Sang-ok Cha

Chan-Ik Park

Jeong-Woo Lee

Bo-Gyeong Kang

Joon-Ho Lee

Yeo-Jin Kim

Byoung-Tak Zhang

Sun-Jae Lee

Sung-Hwan Bae

In-Hwan Doh

Seong-Jun Ahn

Dong-Hoon Ham

Sung-Joo Yoo

Eok-soo Shim

Yoon-kyung Lee

Yun-Gyung Cheong

Sil-wan Chang

Young-Sang Choi

Na-Ri Heo

Nam-Hwan Kim

Sang-Gu Kang

Byung-Chull Bae

Hong-young Jeon

Young-Chan Cho

Seong-Ho Joe

Young-June Gwon

Yong-Hyun Jeong

Jun-Sung Ahn

Chi-Yeon Kim

Kang-Il Lee

Yoon-kyong Lee

Sun-Ho Kim

An apparatus for processing natural language according to an embodiment includes a collection module that collects documents having tags, a parsing module that extracts text from the collected documents and extracts tag-related information on the tag surrounding each extracted text, and a preprocessing module that generates tokens of a preset unit by tokenizing each extracted text, generates token position information for each token in full text of the document, and sets the token and the token position information as training data in matching with the tag-related information.

Apparatus and method for processing natural language

An apparatus for training a document summarization model includes a token generation unit, a named entity recognition unit, and a model training unit. The token generation unit generates document tokens and summarization tokens. The named entity recognition unit assigns named entity token status to a summarization token, recognized as a named entity through NER, and assigns non-named entity token status to the other tokens. The model training unit obtains feature vectors by inputting the plurality of document tokens into an encoder inside a document summarization model, obtains a first loss related to the named entity token, a second loss related to the other tokens, and a total loss using a weighted value by inputting the feature vectors, the summarization tokens, the named entity token, and the non-named entity token into a decoder inside the document summarization model, and trains the document summarization model on the basis of the total loss.

Apparatus and method for training model for document summarization

An apparatus for learning of generative model according to an embodiment includes an encoder configured to extract a feature from input data and output a feature vector, a decoder configured to restore the input data on the basis of the feature vector, and a domain module configured to generate domain information to be learned through a generative model into domain vector blocks, each with a size corresponding to the feature vector, concatenate the feature vector and the domain vector block, and input a concatenated vector to the decoder.

Method for inserting domain information, method and apparatus for learning of generative model

A method of controlling a terminal is provided. The method includes determining a current status of at least one of the terminal and a peripheral environment of the terminal based on information obtained by using at least one sensor from a predetermined list of a plurality of statuses regarding the terminal or the peripheral environment of the terminal, determining an operation schedule of the at least one sensor based on the determined current status and the information obtained by using the at least one sensor, and controlling the at least one sensor to operate based on the determined operation schedule.

Terminal controlling method and terminal therefor

In an operating method of a memory controller, the memory controller includes a logical-to-logical (L2L) mapping table including mapping information between a first logical area and a second logical area and a logical-to-physical (L2P) mapping table including mapping information between the second logical area and a physical area of a memory device. The operating method includes receiving a first logical address of the first logical area and a first command for changing the L2L mapping table to access first data stored in the memory device through the first logical address, detecting a second logical address of the second logical area mapped to a physical address of the physical area in which the first data is stored, in response to the first command, and changing the L2L mapping table to map the first logical address to the second logical address.

Memory controller, nonvolatile memory system, and operating method thereof

A method of recommending a friend in a first terminal is provided. The method includes generating first interest keyword information by analyzing event information of the first terminal, receiving second interest keyword information of a second terminal, comparing the first interest keyword information and the second interest keyword information, and displaying information recommending a user of the second terminal as a friend based on a result of the comparing.

Method of recommending friends, and server and terminal therefor

An operating method of a memory controller, configured to control a non-volatile memory device that performs a refresh read operation, detects a power on state or power off state of the non-volatile memory device and issues a refresh read command. The non-volatile memory device that receives the refresh read command is controlled to perform, one time, the refresh read operation including a read operation on one of a plurality of word lines with respect to each of the plurality of memory blocks.

Operating method of memory controller controlling non-volatile memory device performing refresh read operation

An electrode assembly and a rechargeable battery that can prevent an active material from separating and prevent a short circuit and damage due to a tab that is attached to a current collector are provided. The electrode assembly includes a positive electrode, a negative electrode, and a separator that is disposed between the positive electrode and the negative electrode. The positive electrode has a positive electrode coating portion in which a positive electrode active material layer is formed and a positive electrode uncoated region in which a positive electrode active material layer is not formed, and a positive electrode tab is attached to the positive electrode uncoated region. A first positive electrode protection tape is attached to the positive electrode uncoated region, and the first positive electrode protection tape includes a first cover that covers the side end of the positive electrode coating portion and a second cover that is extended from the first cover and that covers both the positive electrode tab and the positive electrode uncoated region.

Electrode assembly having protection tape and rechargeable battery including the same

A rechargeable battery that includes: an electrode assembly with a first electrode and a second electrode that include uncoated regions and coated regions; a case; a first electrode tab and a second electrode tab coupled to the first and second electrodes; and a laminating tape attached to opposite surfaces of a front end portion disposed at a center of the electrode assembly and opposite surfaces of a terminal end portion disposed at an outermost side of the electrode assembly. The second electrode tab is coupled to the uncoated region of the second electrode toward the uncoated region of the first electrode in the terminal end portion that is disposed at the outermost side of the electrode assembly, the first electrode tab is coupled to the uncoated region of the first electrode while being disposed closer to the coated region than the second electrode tab in the terminal end portion that is disposed at the outermost side of the electrode assembly, and an insulating laminating tape for preventing the second electrode tab and the uncoated region of the first electrode from electrically contacting each other is further included.

Rechargeable battery

A signal detecting circuit of an infrared sensor includes: a cell array in which bolometers sensing infrared rays and outputting signal currents are arranged in an N&#xd7;M format; a level generator that outputs a plurality of bias voltages corresponding to a plurality of bias levels; N resistor non-uniformity correcting circuits that are located in a column direction of the cell array and supply different bias voltages to each of the bolometers; M resistor non-uniformity correcting circuits that are located in a row direction of the cell array and supply different bias voltages to each of the bolometers; a control unit that sets a bias voltage level of each resistor non-uniformity correcting circuit to correct the resistor non-uniformity of the cell array; and N integrators that integrate the signal currents output from the cell array.

Signal detecting circuit of infrared sensor and method of correcting same

An apparatus for generating a probabilistic graphical model based on a time-space structure. The apparatus includes a first matrix generation unit configured to generate a first matrix having variables corresponding to stream data; a second matrix generation unit configured to classify the variables of the first matrix into either object variables that are objects of interest or input variables, acquire combination variables from multi-order combination of the input variables, and generate a second matrix using the acquired combination variables; and a model creation unit configured to create the probabilistic graphical model using the object variables of the first matrix and the combination variables of the second matrix.

Apparatus and method for generating probabilistic graphical model based on time-space structure

A secondary battery in which a fixing tape is attached to an electrode assembly, a positive electrode tab, a negative electrode tab, and a cap plate without use of an insulating case to prevent the electrode assembly from vibrating. The secondary battery includes an electrode assembly including a positive electrode plate to which a positive electrode tab is coupled, a negative electrode plate to which a negative electrode tab is coupled, and a separator interposed between the positive electrode plate and the negative electrode plate, a can having an opened part on one side to accommodate the electrode assembly, a cap assembly sealing the opened part of the can, and a fixing tape continuously attached from the electrode assembly to a bottom surface of the cap assembly while being attached to the positive electrode tab and the negative electrode tab.

Secondary battery

A method of controlling a non-volatile memory device includes comparing the number of banks that are in operating states with a threshold value. If the number of the banks is smaller than the threshold value, data stored in a standby bank is read. If there is no bank having data to be read, a standby bank is programmed. If the number of the banks is equal to or greater than the threshold value or if the reading or the programming is performed, it is determined whether there is a reading or programming command to be performed. If there is the reading or programming command to be performed, the process is repeated from the comparing step. The programming may include programming of a most significant bit (MSB) page or a least significant bit (LSB) page.

Method of controlling non-volatile memory device

Provided are an apparatus and method of measuring integrity, in which unnecessary memory loading of an object for measuring integrity is avoided. The apparatus includes a mapping module loading at least one second object, among a plurality of second objects divided from a first object in accordance with an allocation unit of a memory, into the memory, a memory module storing a hash value of the divided second object, and a measurement module measuring integrity of the first object by comparing a hash value of the loaded at least one second object with the hash value stored in the memory module.

Apparatus and method of measuring integrity

Provided is a programming method that increases writing performance of a flash memory device. The programming method for a flash memory device that includes a plurality of banks including a plurality of memory cells for storing multi-bit data includes the following: programming a most significant bit (MSB) page with respect to banks of a first bank group; programming a least significant bit (LSB) page with respect to banks of a second bank group; programming the MSB page with respect to the banks of the second bank group; and programming the LSB page with respect to the banks of the first bank group.

Programming method for flash memory device

Growing community of inventors

Suwon-si, South Korea

Hyun-Jin Choi