Samsung Electronics Co., Ltd.

Hyun-Ik Kim

Ji-hyun Kim

Tae-ik Kim

Kang-Yeop Choo

Jung-Ho Kim

Woo-seok Kim

Won-Seok Kim

A clock jitter measurement circuit includes: an internal signal generator configured to generate a single pulse signal and an internal clock signal which are both synchronized with an input clock signal received by the clock jitter measurement circuit, a plurality of edge delay cells serially connected to each other and configured to generate a plurality of edge detection signals respectively corresponding to a plurality of delay edges obtained by delaying an edge of the internal clock signal, a plurality of latch circuits configured to latch the single pulse signal in synchronization with the plurality of edge detection signals and output a plurality of sample signals, and a count sub-circuit configured to count a number of activated sample signals of the plurality of sample signals and output a count value based on the counted number of activated sample signals.

Method of measuring clock jitter, clock jitter measurement circuit, and semiconductor devices including the same

Method of measuring clock jitter, clock jitter measurement circuit, and semiconductor device including the same

A circuit for measuring clock jitter includes: an internal signal generator configured to generate an internal clock signal and a single pulse signal, respectively synchronized with an input clock signal; a plurality of delay units being connected in series with each other and configured to generate respective delayed clock signals; a plurality of latch circuits configured to latch the single pulse signal in synchronization with the respective delayed clock signals, and output sampling signals; and a count sub-circuit configured to output a count value resulting from counting a number of active sampling signals of the sampling signals.

Clock jitter measurement circuit and semiconductor device including the same

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Incheon, South Korea

Hyun-Ik Kim