Samsung Display Co., Ltd.

Hyuk Soon Kwon

Joo-han Kim

Jang Soo Kim

Hyoung Cheol Lee

Joo Seok Yeom

Jee-Hun Lim

Tae-Kyung Yim

Doo Youl Lee

Jae-Hak Lee

So-Young Koo

Hwa-Dong Jung

Jeong-Ju Park

Se-Myung Kwon

Wan-Soon Lim

Chun Gi You

Hyung Min Kim

Sun Hee Park

Jong Moo Huh

Jin-ho Oh

Se Myung Kwon

A transistor display panel according to an exemplary embodiment includes: a substrate; a first transistor disposed on the substrate; and a pixel electrode connected to the first transistor, wherein the first transistor includes a lower electrode disposed on the substrate, a first semiconductor overlapping the lower electrode, a first insulating layer covering the first semiconductor, a first gate electrode disposed on the first insulating layer and overlapping the first semiconductor, and a first source connecting member and a first drain connecting member disposed on the same layer as the first gate electrode and connected to the first semiconductor, wherein the first gate electrode is formed as a triple layer, the first source connecting member and first drain connecting member are formed as a double layer, and the first source connecting member is connected to the lower electrode.

Transistor array panel, manufacturing method thereof, and display device including the same

A transistor display panel including: a driving voltage line and a first electrode disposed on a substrate; a semiconductor overlapping the first electrode; and an electrode layer overlapping the semiconductor, the electrode layer including a drain electrode, a gate electrode, and a source electrode. The first electrode and the semiconductor are connected through the source electrode.

Transistor display panel, manufacturing method thereof, and display device including the same

Transistor display panel including lower electrode disposed under a semiconductor and display device including the same

Transistor display panel including lower electrode disposed under semiconductor and display device including the same

An organic light emitting display device includes a substrate, a semiconductor pattern disposed on the substrate, a conductive line disposed in a different layer from the semiconductor pattern, a pixel electrode disposed on the conductive line and on the semiconductor pattern, and a connection electrode disposed in a same layer as the pixel electrode. The connection electrode may be connected to the semiconductor pattern and the conductive line.

Organic light emitting display device and open/short test method thereof

Transistor array panel, including a source connecting member and a drain connecting member manufacturing method thereof, and display device including the same

Disclosed is a thin film transistor array panel including: a substrate including a display area and a peripheral area; a second semiconductor layer disposed on the substrate, and disposed on a first semiconductor layer disposed in the display area and the peripheral area; and a passivation layer disposed on the first semiconductor layer and the second semiconductor layer, wherein the first semiconductor layer and the second semiconductor layer include an oxide semiconductor, and a thickness of the first semiconductor layer is different from that of the second semiconductor layer.

Film transistor array panel and manufacturing method thereof

Exemplary embodiments of the invention disclose a method of manufacturing a thin film transistor array panel having reduced overall processing time and providing a uniform crystallization. Exemplary embodiments of the invention also disclose a crystallization method of a thin film transistor, including forming on a substrate a semiconductor layer including a first pixel area, a second pixel area, and a third pixel area. The crystallization method includes crystallizing a portion of the semiconductor layer corresponding to a channel region of a thin film transistor using a micro lens array.

Crystallization method of thin film transistor, thin film transistor array panel and manufacturing method for thin film transistor array panel

A thin film transistor array panel includes: a gate conductor disposed on a substrate and including a gate line and a gate electrode, a semiconductor layer overlapping the gate electrode and including an oxide semiconductor, a data conductor including a data line intersecting the gate line, a source electrode connected to the data line, and a drain electrode facing the source electrode, a sidewall covering side surface parts of the drain electrode and the source electrode adjacent to a channel region of the semiconductor layer, and a passivation layer covering the source electrode, the drain electrode, and the sidewall.

Thin film transistor array panel and method for manufacturing the same

Growing community of inventors

Suwon-si, South Korea

Hyuk Soon Kwon