Samsung Electronics Co., Ltd.

Hyuk-Joon Kwon

Bok-Yeon Won

Sang-Keun Han

Young-Wook Kim

Chae-Man Lim

Jung-Won Lee

Han-Ju Kim

Jong-han Lim

Min-goo Kim

Sung-Hoon Kim

Jung-Bae Lee

Chul-Woo Park

Youn-Sik Park

Young-Ho Kim

Satoru Yamada

Young-Ju Kim

Soo-Young Kim

Jun-Ho Kim

Su-a Kim

Jong-hyoung Lim

Kyo-Suk Chae

Bo-Tak Lim

In-yup Kang

Hyun-chul Yoon

Hyungil Lee

Won-Kyung Park

Ji-Suk Kwon

Han-Sik Yoo

Jung-Ha Oh

Bum-Jae Lee

Woong-dai Kang

Seung-Seob Lee

In-Yup Kang

Hyoung-ho Ko

Seok-Jae Lee

Ji-Hak Yu

Min-Woo Won

Hyun-kyu Lee

Methods, a Base Station (BS), and a User Equipment (UE) in a wireless communication system for transmitting and receiving control information are provided. The method for transmitting control information by a BS in a wireless communication system includes receiving information related to a signal transmitted by a second BS that the second BS which is a neighboring BS of the first BS, determining whether a second UE using an identical resource to that used by a first UE included in a cell of the first BS exists within a cell of the second BS based on the received information, when the second UE exists, generating control information for controlling a signal transmitted to the second UE by the second BS based on the received information, and transmitting the generated control information to the first UE through a control channel.

Method and apparatus for transmitting and receiving control information in wireless communication system

A sense amplifier includes a sense amplifying unit, first and second isolation units, and first and second offset cancellation unit. The sense amplifying unit includes a first P-type metal-oxide-semiconductor (PMOS) transistor, a second PMOS transistor, a first N-type metal-oxide-semiconductor (NMOS) transistor, and a second NMOS transistor. In a layout of the sense amplifier, the first and second PMOS transistors are disposed in a central region of the sense amplifier, the first and second NMOS transistors are disposed at opposite sides of the sense amplifier from each other, the first isolation unit and the first offset cancellation unit are disposed between the first PMOS transistor and the first NMOS transistor, and the second isolation unit and the second offset cancellation unit are disposed between the second PMOS transistor and the second NMOS transistor. In other layouts, the locations of the PMOS transistors and NMOS transistors may be reversed.

Sense amplifier having offset cancellation

An electronic device is disclosed. The disclosed electronic device includes a memory for storing a key for unlocking a door lock, a communication module for receiving location information, and a processor electrically connected to the memory and the communication module. The processor reads a plurality of keys from the memory based on the location information received via the communication module, and transmits the read plurality of keys to the door lock sequentially.

Electronic device for controlling door lock and method thereof

A memory device including a memory cell array region, includes, column selection signal lines formed in a first column conduction layer of the memory cell array region and extending in a column direction, global input-output data lines formed in a second column conduction layer of the memory cell array region different from the first column conduction layer and extending in the column direction and power lines formed in a shield conduction layer of the memory cell array region between the first column conduction layer and the second column conduction layer. The noises in the signal lines and the power lines may be reduced and performance of the memory device may be enhanced by forming the column selection signal lines and the global input-output data lines in different column conduction layers and forming the power lines in the shield conduction layer between the column conduction layers.

Memory device and method of disposing conduction lines of the same

A semiconductor device includes a substrate, a memory structure and a capacitor structure including at least one array of capacitors. The memory structure is disposed in a first region of the device. The capacitor structure is disposed in a second region of the device. The capacitor structure may include a first capacitor array, a second capacitor array, a third capacitor array and a first landing pad. The first landing pad is disposed between the substrate and lower electrodes of capacitors of the first and second capacitor arrays, and contacts the lower electrodes so as to electrically connect the first capacitor array and the second capacitor array. Upper electrodes of capacitors of the second and third capacitor arrays are integral such that the second capacitor array and the third capacitor array are electrically connected to each other.

Semiconductor devices and methods of manufacturing the same

Methods, a Base Station (BS), and a User Equipment (UE) in a wireless communication system for transmitting and receiving a signal are provided. The method for transmitting a signal by a first BS in a wireless communication system includes receiving control information including information related to transmission of a Reference Signal (RS) by one or more second BSs, from the one or more second BSs which are neighboring BSs of the first BS, and transmitting signals to a UE based on information as to a second resource identified in the received control information, wherein the second resource corresponds to an identical resource to that used by the one or more second BSs for transmitting the RS.

Method and apparatus for transmitting and receiving a signal in a wireless communication system to reduce inter-cell interference

A semiconductor device includes a semiconductor die, a semiconductor integrated circuit and a three-dimensional crack detection structure. The semiconductor die includes a central region and a peripheral region surrounding the central region. The semiconductor integrated circuit is formed in the central region. The three-dimensional crack detection structure is formed in a ring shape in the peripheral region to surround the central region. The three-dimensional crack detection structure is expanded in a vertical direction. Using the three-dimensional crack detection structure, the crack penetration of various types may be detected thoroughly.

Semiconductor device including three-dimensional crack detection structure

Growing community of inventors

Yongin-si, South Korea

Hyuk-Joon Kwon