Samsung Electronics Co., Ltd.

Other

Hyuek-Jae Lee

Tae-Je Cho

Un-Byoung Kang

Hyung-Sun Jang

Cha-Jea Jo

Eun-Mi Kim

Ji-sun Hong

Jong-Yun Myung

Jung-Hwan Kim

Yong-Hwan Kwon

Tae-Hun Kim

Tae-Hong Min

Ji-hoon Kim

Ji-seok Hong

Chung-Sun Lee

Ji-Hwan Hwang

Woon-Seong Kwon

Young-Bok Kim

A semiconductor package includes: a plurality of unit redistribution layers vertically stacked, each including: a first polymer layer having a first via hole pattern; a second polymer layer formed on the first polymer layer, and having a redistribution pattern on the first polymer layer and a second via hole pattern in the first via hole pattern; a seed layer covering sidewalls and bottom surfaces of the redistribution pattern and the second via hole pattern; a conductive via plug formed in the second via hole pattern; and a conductive redistribution line formed in the redistribution pattern; a connection terminal disposed on a bottom surface of a lowermost unit redistribution layer and electrically connected to the conductive via plug; a semiconductor device mounted on the unit redistribution layers with a conductive terminal interposed therebetween. Upper surfaces of the second polymer layer, the conductive redistribution line and the conductive via plug are substantially coplanar.

Interposer, semiconductor package, and method of fabricating interposer

A die stack structure may include a base die having base contact pads insulated by a base protection patterns and a flat side surface, a die stack bonded to the base die and having a plurality of component dies on the base die such that each of the component dies includes component contact pads insulated by a corresponding component protection pattern, and a residual mold unevenly arranged on a side surface of the die stack such that the component dies are attached to each other by the residual mold.

Die stack structure, semiconductor package having the same and method of manufacturing the same

A method of fabricating an interposer includes: providing a carrier substrate; forming a unit redistribution layer on the carrier substrate, the unit redistribution layer including a conductive via plug and a conductive redistribution line; and removing the carrier substrate from the unit redistribution layer. The formation of the unit redistribution layer includes: forming a first photosensitive pattern layer including a first via hole pattern; forming a second photosensitive pattern layer including a second via hole pattern and a redistribution pattern on the first photosensitive pattern layer; at least partially filling insides of the first via hole pattern, the second via hole pattern, and the redistribution pattern with a conductive material; and performing planarization to make a top surface of the unit redistribution layer flat. According to the method, no undercut occurs under a conductive structure and there are no bubbles between adjacent conductive structures, thus device reliability is enhanced and pattern accuracy is realized.

Method of fabricating an interposer

A method of forming a semiconductor device includes preparing a semiconductor substrate having a plurality of chips formed thereon and a scribe lane disposed between the chips, simultaneously forming a groove having a first depth in the scribe lane, and a through hole penetrating the chips and having a second depth. The chips are separated along the groove. The first depth is smaller than the second depth.

Method of forming semiconductor device

A method of packaging a semiconductor device may include providing a semiconductor substrate including first and second spaced apart semiconductor chip areas, and adhering a cover on the first and second spaced apart semiconductor chip areas of the semiconductor substrate. A scribe line may be formed through the semiconductor substrate between the first and second semiconductor chip areas with a semiconductor bridge pattern remaining connected between the first and second spaced apart semiconductor chip areas after forming the scribe line. The cover and the semiconductor bridge pattern may then be cut after forming the scribe line.

Methods of packaging semiconductor devices including bridge patterns

One embodiment exemplarily described herein can be characterized as an image sensor including a substrate having a front surface and a rear surface; a photoelectric converting portion on the front surface of the substrate; a through via extending through the substrate, wherein the through via is electrically connected to the photoelectric converting portion; an external connection terminal on the rear surface of the substrate, wherein the external connection terminal is connected to the through via; and a light shading layer formed on a portion of the rear surface of the substrate, wherein the light shading layer is substantially opaque with respect to an external light. In some embodiments, the portion of the rear surface of the substrate on which the light shading layer is formed is not overlapped by the through via or the external connection terminal.

Image sensor having through via

Growing community of inventors

Hwaseong-si, South Korea

Hyuek-Jae Lee