Samsung Electronics Co., Ltd.

Amazon Technologies, Inc.

Hyoung-Wook Lee

Min-Su Kim

Jeongho Lee

Woo Yong Sung

Suhwan Kim

Sang-Il Kim

Jin-Soo Park

Dong-Hwan Kim

Tae-Woon Cha

Ah-Reum Kim

Hyeon Gu Cho

Gun-Ok Jung

Myung-Hwan Kim

Chung-Hee Kim

Rahul Singh

An electrowetting display apparatus includes a first base substrate, a second base substrate which faces the first base substrate, a first electrode on the first base substrate, and a second electrode on the second base substrate, where the second electrode faces the first electrode. A barrier wall is on the first electrode, where the barrier wall defines a storage area. A surface of the first electrode and the barrier wall is overlapped by a barrier layer. In addition, a water-repellent layer is on the barrier layer which is in the storage area. First and second fluids are in the storage area, the first fluid is separate from the second fluid, and the first fluid or the second fluid has a polarity.

Electrowetting display apparatus and method of manufacturing the same

A scan flip-flop circuit includes a pulse generator, a dynamic input unit and a latch output unit. The pulse generator generates a pulse signal which is enabled in synchronization with a rising edge of a clock signal in a normal mode, and is selectively enabled in synchronization with the rising edge of the clock signal in response to a logic level of a scan input signal in a scan mode. The dynamic input unit precharges a first node to a power supply voltage in a first phase of the clock signal, selectively discharges the first node in the normal mode, and discharges the first node in the scan mode. The latch output unit latches an internal signal provided from the first node to provide an output data, and determines whether the output data is toggled based on the clock signal and a previous state of the output data.

Flip-flop circuit and scan flip-flop circuit

A domino logic circuit includes a first evaluation unit, a second evaluation unit and an output unit. The first evaluation unit precharges a first dynamic node, discharges a footer node in a first phase of a clock signal, and evaluates a plurality of input signals to determine a logic level of the first dynamic node in a second phase of the clock signal. The second evaluation unit precharges a second dynamic node in the first phase of the clock signal, and determines a logic level of the second dynamic node in response to a logic level of the footer node in the second phase of the clock signal. The output unit provides an output signal having a logic level according to levels of a first voltage of the first dynamic node and a second voltage of the second dynamic node.

Domino logic circuits and pipelined domino logic circuits

Flip-flop circuits including a dynamic input unit and a control clock generator are provided. The dynamic input unit precharges an evaluation node to a power supply voltage in a first phase of a clock signal, selectively discharges the evaluation node based on input data in a second phase of the clock signal, and compensates for voltage drop of the evaluation node in response to a first control clock signal. The control clock generator generates the first control clock signal and a second control clock signal based on at least the clock signal.

Flip-flop circuits and system including the same

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Seoul, South Korea

Hyoung-Wook Lee