Samsung Electronics Co., Ltd.

Infopia Co., Ltd.

Hyong-Soo Kim

Ju-Wan Kim

Hyun-young Kim

Byeong-Woo Bae

Ju-Bum Lee

Sung-dong Lee

Byoung-Yong Gwak

Kukhan Yoon

Sang-Hyeop Lee

Shin-Hye Kim

Hyun-kuk Ko

Young-Roe Kim

Kyung-Burn Koo

Dong-chan Park

Dong-Geun Na

According to example embodiments of inventive concepts, method of forming a semiconductor memory devices includes sequentially forming a first mold layer, a first support layer, a second mold layer, and a second support layer on a substrate, forming lower electrodes penetrating the second support layer, the second mold layer, the first support layer, and the first mold layer on the substrate, patterning the second support layer to form a second support pattern including an opening, removing the second mold layer to expose portions of sidewalls of the lower electrodes, and etching the exposed sidewalls of the lower electrodes.

Semiconductor memory devices and methods of forming the same

A method for measuring glycated hemoglobin includes hemolyzing a blood sample with a hemolysate; reacting the hemolyzed blood sample with bead conjugates in which beads are conjugated with glycated hemoglobin binding materials; measuring the amount of total hemoglobin in the reacted blood sample; isolating normal hemoglobin from the glycated hemoglobin conjugated with the bead conjugates; measuring the amount of glycated hemoglobin isolated from the normal hemoglobin; and determining the percentage of the glycated hemoglobin in the blood sample on the basis of the measured amounts of total hemoglobin and glycated hemoglobin. The isolation of normal hemoglobin is performed by absorbing the normal hemoglobin using an absorption pad that is a porous pad having pores, each of which has a size greater than the size of the normal hemoglobin and smaller than the size of the bead.

Method for measuring glycated hemoglobin

A method of forming a mask pattern for fabricating a semiconductor device. A first region and a second region, having an intersecting third region, are defined in the semiconductor substrate. An inorganic mask layer is etched in the first region to a predetermined thickness, and etched in the second region to another predetermined thickness. While the inorganic mask layer is etched in the first and second region, an organic mask layer is exposed in the third region. The organic mask layer exposed in the third region is removed to form a mask pattern. Consequently, double exposure is performed using the organic mask layer and the inorganic mask layer, so that a fine feature size that closely follows a desired layout can be formed, damage to the organic mask layer by ashing is prevented, and adhesiveness between the organic mask layer and the inorganic mask layer can be improved.

Method of forming a mask pattern for fabricating a semiconductor device

A method of manufacturing a semiconductor device by which a generation of a void is prevented after depositing an interlayer dielectric material. First, a plurality of conductive patterns are formed on a substrate and then, a capping insulation layer is formed on the conductive patterns. The capping insulation layer is treated with plasma, and an interlayer dielectric material is deposited on the plasma treated capping insulation layer. The dependency of the interlayer dielectric on the type of material and form of an underlying layer is reduced to improve a gap-filling characteristic, especially for a gap having a high aspect ratio. An improved gap-filling characteristic is accomplished and the formation of all or substantially all of the voids from forming in a gap is prevented even though an interlayer dielectric is deposited under a conventional deposition conditions.

Method of manufacturing a semiconductor device

A method and an apparatus for removing particulate contaminant are provided in order to ensure high purity during a tungsten suicide deposition process. The method for removing particulate contaminant in tungsten silicide deposition process using SiH,as silicon source gas and NF,as cleaning gas, includes purging a carrier gas line for an SiH,silicon source gas to remove the contaminant in the chamber and carrier gas line when the carrier gas is supplied with the chamber, and the NF,cleaning gas is supplied to the chamber to form plasma. After a plasma cleaning, the gas line flowing reaction gas responding to the SiH,is purged to remove the contaminant in the chamber and the reaction gas line. As a result, any particulate contaminant is removed or remains at a minimum level that has no effect on the tungsten silicide deposition process.

Filtering technique for CVD chamber process gases

Growing community of inventors

Suwon-si, South Korea

Hyong-Soo Kim