Hynix Semiconductor Inc.

Hyo-Geun Yoon

Heung-Jae Cho

Kwan-Yong Lim

Se-Aug Jang

Hyun-Chul Sohn

Seok-Kiu Lee

Disclosed is a method for fabricating a semiconductor device with a dual gate dielectric structure. The method includes the steps of: sequentially forming a first oxide layer, a nitride layer and a second oxide layer on a substrate provided with a cell region for the NVDRAM and a peripheral circuit region for a logic circuit; forming a mask on the cell region; performing a first wet etching process by using the mask as an etch barrier to remove the second oxide layer formed in the peripheral circuit region; performing a second wet etching process by using the second oxide layer remaining in the cell region as an etch barrier to remove the nitride layer formed in the peripheral circuit region; forming a third oxide layer on the first oxide layer remaining in the peripheral circuit region; and forming a gate electrode on the second oxide layer and the third oxide layer.

Growing community of inventors

Ichon-shi, South Korea

Hyo-Geun Yoon