Samsung Electronics Co., Ltd.

Hyesung Park

Jonghyuk Park

Inho Kim

Byoungho Kwon

Inseak Hwang

Yanghee Lee

Jin-Woo Bae

Boun Yoon

Jinwoo Bae

Youngho Koh

Myungjae Jang

A semiconductor device including a substrate having a cell region and a peripheral region; a cell gate structure disposed on the cell region; a first impurity region and a second impurity region, arranged on first and second sides of the cell gate structure in the cell region; a bit line structure disposed on the cell gate structure and connected to the first impurity region; a peripheral gate structure disposed on the peripheral region; a peripheral capping layer disposed on the peripheral region, covering the peripheral gate structure, and having an upper surface at substantially the same level as an upper end of the bit line structure; and a cell contact structure disposed on the second impurity region, and having a conductive barrier and a contact material layer on the conductive barrier, wherein the conductive barrier covers the upper end of the bit line structure.

Semiconductor device and a fabrication method thereof

Provided are a semiconductor device and a method of fabricating the same. The semiconductor device may include a semiconductor substrate including a first region and a second region, a dummy separation pattern provided on the second region of the semiconductor substrate to have a recessed region at its upper portion, a first electrode provided on the first region of the semiconductor substrate, a dielectric layer covering the first electrode, a second electrode provided on the dielectric layer, and a remaining electrode pattern provided in the recessed region. The second electrode and the remaining electrode pattern may be formed of a same material.

Semiconductor device and method of fabricating the same

A method of fabricating a semiconductor device includes providing a substrate including a pair of first regions and a second region therebetween, forming first patterns on the respective first regions to at least partially define a stepwise portion at the second region, and forming a dummy pattern that at least partially fills the stepwise portion. The dummy pattern may be an electrically floating structure. The dummy pattern may be formed as part of forming second patterns on the respective first regions, and the dummy pattern and the second patterns may include substantially common materials. Because the dummy pattern at least partially fills the stepwise portion at the second region, the material layer covering the second patterns and the dummy pattern may omit a corresponding stepwise portion.

Method of fabricating semiconductor device

Growing community of inventors

Anyang-si, South Korea

Hyesung Park