Samsung Electronics Co., Ltd.

HyeongJun Kim

Kitae Park

Dongku Kang

Sang-Hyun Joo

Youngho Lim

Ohsuk Kwon

Seung-Hwan Shin

A nonvolatile memory device includes a memory cell array including a plurality of memory cells, a page buffer circuit connected with the memory cell array via a plurality of bit lines and configured to selectively pre-charge the plurality of bit lines, and control logic configured to control the page buffer circuit such that a pre-charge voltage is applied to selected bit lines of the plurality of bit lines during a first time at a read operation and such that a pre-charge voltage is applied to selected bit lines of the plurality of bit lines during a second time different from the first time at a verification read operation. The second time is determined on the basis of the number of selected bit lines of the plurality of bit lines at the verification read operation.

Nonvolatile memory device and method of improving a program efficiency thereof

A method of programming a non-volatile memory including N-bit multi-level cell (MLC) memory cells includes executing first through (N&#x2212;1)page programming operations, using an incremental step pulse programming (ISPP) method, to program first through (N&#x2212;1)data pages in the MLC memory cells, where each of the first through (N&#x2212;1)page programming operations includes an erase programming of erase cells among the MLC memory cells. The method further includes executing an Nth page programming operation, using the ISPP method, to program an Ndata page in the MLC memory cells.

Nonvolatile memory device and system, and method of programming a nonvolatile memory device

Growing community of inventors

Anyang-si, South Korea

HyeongJun Kim