Hyundai Electronics Industries Co. Ltd.

Hyeon Soo Kim

Chang Seo Park

Hyung Bok Choi

In Seok Yeo

Sang Moo Lee

Sang Do Lee

Choong H Lee

The present invention relates to a semiconductor technology and more specifically to a method of fabricating a gate electrode of a semiconductor device, where a re-oxidation process that may cause an abnormal oxidation can be eliminated. In a polysilicon/silicide structure or polysilicon/metal structure of gate electrode, a step of etching side parts of gate electrode is performed without any etch mask after gate patterning. Here, the etch can be made by wet or dry etch using an etchant having high selectivity of polysilicon film to a gate oxide film, so that the damaged gate oxide part during the gate patterning is allowed not to make a role of the gate insulating film itself, thereby eliminating the re-oxidation process.

Method for fabricating a gate electrode of a semiconductor device

Disclosed is a method for forming a gate electrode of a semiconductor device, the method comprises the steps of: stacking a gate oxide film, a doped first silicon film, a diffusion preventing film, a metal film having a high melting point and a mask insulating film on a semiconductor substrate; forming a gate electrode by patterning a resultant stack structure; forming a second silicon film on an entire surface of a resultant structure; forming an oxidation preventing film on an entire surface of a resultant structure; forming a spacer on a side wall of the gate electrode by anisotrophically etching the oxidation preventing film and the second silicon film; and forming a gate reoxide film on the semiconductor substrate by oxidizing the semiconductor substrate.

Method for forming gate electrode of a semiconductor device with dual spacer to protect metal portion of gate

A method of forming a gate electrode in a semiconductor device is disclosed. A method of forming a gate electrode in a semiconductor device according to the present invention includes steps of: forming a gate oxide layer, a polysilicon layer, a diffusion barrier layer, a metal layer and a mask layer on a semiconductor substrate, in sequence; patterning the mask layer, the metal layer and the diffusion barrier layer to the first width; patterning the mask layer, the metal layer and the diffusion barrier layer having the first width to a second width by wet etching; forming a spacer on the side walls of the mask layer, the metal layer and the diffusion barrier layer having the second width; and patterning the polysilicon layer and the gate oxide layer using the mask layer and the spacer as an etch barrier.

Method of forming gate electrode in semiconductor device

The present invention relates to a method of manufacturing a semiconductor device, which is capable of effectively removing a WO,film generated on a tungsten silicide during contact hole etch that opens a gate electrode including the tungsten silicide as its top film by selectively etching a interlayer insulating film. The WO,film is removed by a washing process using an alkaline solution such as TMAH(tetra-methyl-ammonium-hydroxide) or NH,OH solution. The effective removal of the WO,film reduces the contact resistance between a conductive material layer to be formed in the contact hole by a later process and the gate electrode, thereby improving the operative characteristics of the semiconductor device. TMAH solution used in the washing process has a high selectivity of WO,film relative to a thermal oxide film or a BPSG film that is generally used as the interlayer insulating film. Thus, the present invention is capable of minimizing the damage of the side parts of the interlayer insulating film during the washing process after contact etching.

Method of manufacturing a semiconductor device capable of reducing contact resistance

Generally, after etching process for gate electrode patterning, oxidation process is performed to compensate for etching damage. There is provided a method for forming a gate electrode of a semiconductor device, which prevents the metal layer comprised of the gate electrode for being oxidized in such an oxidation process. In the present invention, a polysilicon layer is etched to form a gate electrode pattern and re-oxidation process is performed to compensate for the etching damage. After this, an inter-layer insulating layer is formed over the entire structure and partially removed so as to expose the polysilicon layer. A part of the polysilicon layer is then selectively removed to form an opening in the inter-layer insulating layer. Here, the other part of the polysilicon layer, which will be connected to a metal layer later, is exposed through the opening. The metal layer is then buried within the opening to complete the formation of the gate electrode made of poly-metal structure.

Methods for forming gate electrodes of semiconductor devices

A method of forming a gate electrode in a semiconductor device which can easily perform etching process for forming the gate electrode and reduce the resistivity of a gate electrode, is disclosed. In the present invention, a gate oxide layer, an amorphous silicon layer and a tungsten silicide layer are sequentially formed on a semiconductor substrate. A mask oxide pattern is then formed on the tungsten silicide layer in the shape of a gate electrode. Next, the tungsten silicide layer and the amorphous silicon layer are etched using the mask oxide pattern as an etch mask, to form a gate electrode. Thereafter, the amorphous silicon layer and the tungsten silicide layer of the gate electrode are thermal-treated by RTP spike annealing and an oxide layer is then formed on the side wall of the gate electrode. According to the present invention, by reducing resistivity of a tungsten silicide layer, it is possible to apply a conventional gate electrode material to high integration device over 1GDRAM, thereby lowering cost to develop a new gate electrode material. Furthermore, etching process for forming a gate electrode is easily performed when using the tungsten silicide layer as the gate electrode material, thereby obtaining uniform gate electrode. As a result, the reliability of a device is improved.

The present invention relates to a method of manufacturing a semiconductor device, which is capable of effectively removing a WO.sub.3 film generated on a tungsten silicide during contact hole etch that opens a gate electrode including the tungsten silicide as its top film by selectively etching a interlayer insulating film. The WO.sub.3 film is removed by a washing process using an alkaline solution such as TMAH(tetra-methyl-ammonium-hydroxide) or NH.sub.4 OH solution. The effective removal of the WO.sub.3 film reduces the contact resistance between a conductive material layer to be formed in he contact hole by a later process and the gate electrode, thereby improving the operative characteristics of the semiconductor device. TMAH solution used in the washing process has a high selectivity of WO.sub.3 film relative to a thermal oxide film or a BPSG film that is generally used as the interlayer insulating film. Thus, the present invention is capable of minimizing the damage of the side parts of the interlayer insulating film during the washing process after contact etching.

Method of manufacturing a semiconductor device capable of reducing

A method of fabricating a gate electrode of a CMOS device is disclosed including the steps of: sequentially forming a gate insulating layer, first conductive layer and protective layer on a semiconductor substrate; selectively etching a predetermined portion of the protective layer in which a PMOS transistor will be formed; forming a second conductive layer on the overall surface of said substrate; removing the second conductive layer formed on the protective layer, and partially etching the protective layer to a predetermined thickness; and patterning the second conductive layer, the protective layer, the first conductive layer and the gate insulating layer using a gate electrode pattern.

Growing community of inventors

Ichon-shi, South Korea

Hyeon Soo Kim