Hynix Semiconductor Inc.

Hyeon Ju An

Sang Tae Ahn

Dong Sun Sheen

Seok Pyo Song

Chan Bae Kim

Sung Kyu Min

Hyo Seok Lee

Chai O Chung

Ja Chun Ku

Eun Jeong Kim

Jong Min Lee

Hyun Chul Sohn

Chae O Chung

A reactive cyclodextrin derivative or a reactive glucose derivative is used as a template derivative for forming an ultra-low dielectric layer. A layer is formed of the reactive cyclodextrin derivative or the reactive glucose derivative capped with Si&#x2014;H and then cured in an atmosphere of hydrogen peroxide to form the ultra-low dielectric layer.

Template derivative for forming ultra-low dielectric layer and method of forming ultra-low dielectric layer using the same

A semiconductor device includes a semiconductor substrate having an active region which includes a gate forming zone and an isolation region; an isolation layer formed in the isolation region of the semiconductor substrate to expose side surfaces of a portion of the active region including the gate forming zone, such that the portion of the active region including the gate forming zone constitutes a fin pattern; a silicon epitaxial layer formed on the active region including the fin pattern; and a gate formed to cover the fin pattern on which the silicon epitaxial layer is formed.

Semiconductor device having reduced standby leakage current and increased driving current and method for manufacturing the same

A process for manufacturing a semiconductor device using a spacer as an etch mask for forming a fine pattern is described. The process includes forming a hard mask layer over a target layer that is desired to be etched. A sacrificial layer pattern is subsequently formed over the hard mask layer. Spacers are formed on the sidewalls of the sacrificial layer pattern. The protective layer is formed on the hard mask layer portions between the sacrificial patterns formed with the spacer. The sacrificial layer pattern and the protective layer are then later removed, respectively. The hard mask layer is etched using the spacer as an etching mask. After etching, the spacer is removed. Finally, the target layer is etched using the etched hard mask as an etching mask.

Method for manufacturing a semiconductor device using a spacer as an etch mask for forming a fine pattern

A semiconductor device is manufactured by forming a low dielectric constant layer on a semiconductor substrate which is formed with metal lines; implementing primary ultraviolet treatment of the low dielectric constant layer; forming a capping layer on the low dielectric constant layer having undergone the primary ultraviolet treatment; and implementing secondary ultraviolet treatment of the low dielectric constant layer including the capping layer.

Method for manufacturing semiconductor device utilizing low dielectric layer filling gaps between metal lines

An isolation structure of a semiconductor device is formed by forming a hard mask layer on a semiconductor substrate having active and field regions to expose the field region. A trench is defined by etching the exposed field region of the semiconductor substrate using the hard mask as an etch mask. An SOG layer is formed in the trench partially filling the trench. An amorphous aluminum oxide layer is formed on the resultant substrate including the SOG layer. An HDP layer is formed on the amorphous aluminum oxide layer to completely fill the trench. The HDP layer and the amorphous aluminum oxide layer are subjected to CMP to expose the hard mask. The hard mask and portions of the amorphous aluminum oxide layer that are formed on the HDP layer are removed. The amorphous aluminum oxide layer is crystallized.

Method of forming isolation structure of semiconductor device for preventing excessive loss during recess gate formation

A method for manufacturing a semiconductor device is disclosed. The method includes the steps of defining a trench into a field region of a semiconductor substrate having an active region and the field region; partially filing the trench with a flowable insulation layer; completely filling the trench with an isolation structure by depositing a close-packed insulation layer on the flowable insulation layer in the trench; etching through a portion of the close-packed insulation layer and etching into a partial thickness of the flowable insulation layer of the insulation structure to expose a portion of the active region; cleaning the resultant substrate having the active region relatively projected; forming spacers on etched portions of the flowable insulation layer where bowing occurs during the cleaning step; and forming gates on the active region and the insulation structure to border the exposed portion of the active region.

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Gyeonggi-do, South Korea

Hyeon Ju An