Samsung Electronics Co., Ltd.

Industry-University Cooperation Foundation Hanyang University

Hyeon Joo Seul

Jae Kyeong Jeong

Yun Heub Song

Chang Hwan Choi

Min Hee Cho

Sungwon Yoo

Wonsok Lee

Min Tae Ryu

Jae Seok Hur

Hyun Ji Yang

Provided is a semiconductor memory device comprising a bit line extending in a first direction, a channel pattern on the bit line and including a first oxide semiconductor layer in contact with the bit line and a second oxide semiconductor layer on the first oxide semiconductor layer, wherein each of the first and second oxide semiconductor layers includes a horizontal part parallel to the bit line and first and second vertical parts that vertically protrude from the horizontal part, first and second word lines between the first and second vertical parts of the second oxide semiconductor layer and on the horizontal part of the second oxide semiconductor layer, and a gate dielectric pattern between the channel pattern and the first and second word lines. A thickness of the second oxide semiconductor layer is greater than that of the first oxide semiconductor layer.

Semiconductor memory device having a confinement layer with a two-dimensional electron gas in the confinement layer

The semiconductor device includes a substrate, a stack structure including gate patterns and interlayer insulating films that are alternately stacked on the substrate, an insulating pillar extending in a thickness direction of the substrate within the stack structure, a polycrystalline metal oxide film extending along a sidewall of the insulating pillar between the insulating pillar and the stack structure, a liner film having a transition metal between the insulating pillar and the polycrystalline metal oxide film, and a tunnel insulating film, a charge storage film, and a blocking insulating film which are disposed in order between the polycrystalline metal oxide film and the gate patterns.

Thin film transistor and vertical non-volatile memory device including transition metal-induced polycrystalline metal oxide channel layer

Method for fabricating a semiconductor device

A thin film transistor and a non-volatile memory device are provided. The thin film transistor comprises a gate electrode, and a metal oxide channel layer traversing the upper or lower portions of the gate electrode. The metal oxide channel layer has semiconductor properties while having bixbyite crystals. An insulating layer is disposed between the gate electrode and the metal oxide channel layer. Source and drain electrodes are electrically connected to both ends of the metal oxide channel layer, respectively.

Thin film transistor and vertical non-volatile memory device including metal oxide channel layer having bixbyite crystal

Growing community of inventors

Seoul, South Korea

Hyeon Joo Seul