Samsung Electronics Co., Ltd.

Samsung Display Co., Ltd.

Hye-Young Ryu

Woo-Geun Lee

Jang-Soo Kim

Young-Joo Choi

Ki-Won Kim

Seung-Ha Choi

Kap-Soo Yoon

Kyoung-Jae Chung

Hyang-Shik Kong

Sang-Gab Kim

Young-Wook Lee

Shi-Yul Kim

Jae-Hyoung Youn

Pil-Sang Yun

Young-Hoon Yoo

Je-Hun Lee

Do-Hyun Kim

Min-Seok Oh

Jin-Won Lee

Hong-Kee Chin

Dong-Ju Yang

Sung-Man Kim

Jin-Ho Ju

Kyung-Wook Kim

Su-Hyoung Kang

Young-Goo Song

Byung-Duk Yang

Sang-Woo Whangbo

Hee-Jun Byeon

Kyoung-Ju Shin

Kyung-Sook Jeon

Xun Zhu

Dong-Hoon Lee

Mee-Hye Jung

Yeong-Keun Kwon

Sang-Ki Kwak

Hyun-Jung Lee

Kyung-Chang Ryoo

Yoon-Ho Kang

Hee-Hwan Choe

Sung-Haeng Cho

Yong-jun Lee

Jae-Woo Park

Chong-Chul Chal

Kyoung-Tae Han

Shl-Yul Kim

Provided is a method of operating a resistive memory device including a memory cell array. The method includes the resistive memory device performing a first write operation in response to an active command and a write command and performing a second write operation in response to a write active command and the write command. The first write operation includes a read data evaluation operation for latching data read from the memory cell array in response to the active command. The second write operation excludes the read data evaluation operation.

Method of operating resistive memory device capable of reducing write latency

A thin film transistor panel includes an insulating substrate, a gate insulating layer disposed on the insulating substrate, an oxide semiconductor layer disposed on the gate insulating layer, an etch stopper disposed on the oxide semiconductor layer, and a source electrode and a drain electrode disposed on the etch stopper.

Thin film transistor panel having an etch stopper on semiconductor

A thin film transistor array substrate capable of reducing degradation of a device due to degradation of an oxide semiconductor pattern and a method of fabricating the same are provided. The thin film transistor array substrate may include an insulating substrate on which a gate electrode is formed, a gate insulating film formed on the insulating substrate, an oxide semiconductor pattern disposed on the gate insulating film, an anti-etching pattern formed on the oxide semiconductor pattern, and a source electrode and a drain electrode formed on the anti-etching pattern. The oxide semiconductor pattern may include an edge portion positioned between the source electrode and the drain electrode, and the edge portion may include at least one conductive region and at least one non-conductive region.

Thin film transistor array substrate and method of fabricating the same

A thin film transistor panel includes a substrate, a light blocking layer on the substrate, a first protective film on the light blocking layer, a first electrode and a second electrode on the first protective film, an oxide semiconductor layer on a portion of the first protective film exposed between the first electrode and the second electrode, an insulating layer, a third electrode overlapping with the oxide semiconductor layer and on the insulating layer, and a fourth electrode on the insulating layer. The light blocking layer includes first sidewalls, and the first protective film includes second sidewalls. The first and the second sidewalls are disposed along substantially the same line.

Thin film transistor panel and fabricating method thereof

A thin-film transistor includes a semiconductor pattern, a first gate electrode, a source electrode, a drain electrode and a second gate electrode. The semiconductor pattern is formed on a substrate. A first conductive layer has a pattern that includes the first gate electrode which is electrically insulated from the semiconductor pattern. A second conductive layer has a pattern that includes a source electrode electrically connected to the semiconductor pattern, a drain electrode spaced apart from the source electrode, and a second gate electrode electrically connected to the first gate electrode. The second gate electrode is electrically insulated from the semiconductor pattern, the source electrode and the drain electrode.

Thin-film transistor, array substrate having the same and method of manufacturing the same

In a thin-film transistor (TFT) substrate, a gate insulating layer is disposed on a gate electrode electrically connected to a gate line. A semiconductor layer is disposed on the gate insulating layer. A source electrode is electrically connected to a data line that intersects the gate line. A drain electrode faces the source electrode and defines a channel area of a semiconductor layer. An organic layer is disposed on the data line and has a first opening exposing the channel area. An inorganic insulating layer is disposed on the organic layer. A pixel electrode is disposed on the inorganic insulating layer and electrically connected to the drain electrode. The inorganic insulating layer covers the first opening, and thickness of the inorganic insulating layer is substantially uniform.

Thin-film transistor substrate, method of manufacturing the same and display apparatus having the same

A display substrate includes a gate line extending in a first direction on a base substrate, a data line on the base substrate and extending in a second direction crossing the first direction, a gate insulating layer on the gate line, a thin-film transistor and a pixel electrode. The thin-film transistor includes a gate electrode electrically connected the gate line, an oxide semiconductor pattern, and source and drain electrodes on the oxide semiconductor pattern and spaced apart from each other. The oxide semiconductor pattern includes a first semiconductor pattern including indium oxide and a second semiconductor pattern including indium-free oxide. The pixel electrode is electrically connected the drain electrode.

Display substrate and method of manufacturing the same

A display substrate includes a gate wire formed on an insulating substrate, a semiconductor pattern formed on the gate wire and containing a metal oxynitride compound, and a data wire formed on the semiconductor pattern to cross the gate wire. The semiconductor pattern has a carrier number density ranging from 10/cmto 10/cm.

Contamination is blocked from material of a color filter layer provided on a thin-film transistors (TFT) supporting substrate by sealing over the color filter layer with an inorganic insulating layer. During mass production manufacture, a plasma surface cleaning step is employed after the color filter layer is deposited but before the inorganic insulating layer is deposited. A low temperature CVD process is used to deposit the inorganic insulating layer with a substantially uniform thickness conformably over the color filter layer including conformably into openings provided through the color filter layer.

Thin-film transistor substrate, method of manufacturing same and display apparatus having same

A thin film transistor array panel is provided, which includes a gate line, a data line intersecting the gate line, a storage electrode apart from the gate and data lines, a thin film transistor connected to the gate and data lines and having a drain electrode, a pixel electrode connected to the drain electrode, a first insulating layer over the thin film transistor and disposed under the pixel electrode, and a second insulating layer disposed on the first insulating layer and having an opening exposing the first insulating layer on the storage electrode.

Thin film transistor array panel having improved storage capacitance and manufacturing method thereof

A display device includes a gate pattern, a semiconductor pattern, a source pattern and a pixel electrode are provided. The gate pattern is formed on a base substrate and includes a gate line and a gate electrode. The semiconductor pattern is formed on the base substrate having the gate pattern and includes an oxide semiconductor. The source pattern is formed from a data metal layer and formed on the base substrate having the semiconductor pattern, and includes a data line, a source electrode and a drain electrode. The data metal layer includes a first copper alloy layer, and a lower surface of the data metal layer substantially coincides with an upper surface of the semiconductor pattern. The pixel electrode is formed on the base substrate having the source pattern and electrically connected to the drain electrode. Thus, manufacturing processes may be simplified, and reliability may be improved.

Display device and method of manufacturing the same

Growing community of inventors

Seoul, South Korea

Hye-Young Ryu