Samsung Electronics Co., Ltd.

Hye Won Shim

Yoo Hwan Kim

Sang Woo Pae

Jeong Min Jo

A method for predicting a failure rate of a semiconductor integrated circuit includes receiving a circuit netlist corresponding to circuit defining data, which defines a connection relation, input, output, size, type and operating temperature of each transistor of a plurality of transistors included in the semiconductor integrated circuit. Low-risk transistors having a low-failure probability among the plurality of transistors are detected and filtered out based on the circuit netlist. Failure rates are calculated of respective high-risk transistors other than the low-risk transistors among the plurality of transistors. A total failure rate of the semiconductor integrated circuit is calculated based on the failure rates of the respective high-risk transistors.

Method and device for predicting reliability failure rate of semiconductor integrated circuit and method of manufacturing the semiconductor integrated circuit

Growing community of inventors

Seoul, South Korea

Hye Won Shim