Samsung Electronics Co., Ltd.

Hwanwook Park

Dohyung Kim

Dongyoon Seo

Wonseop Lee

Jeonghoon Baek

Seunghee Mun

Jinoh Ahn

Kyeongseon Park

Dongmin Jang

Jaeseok Jang

Yong-Jin Kim

Jong-hyun Seok

Yunho Lee

Bora Kim

Jaekwang Lee

Geunje Park

Yejin Cho

Daae Heo

Seungyeong Lee

Sangkeun Kwak

A printed circuit board includes a first electrically conductive reference plane configured to distribute a first reference voltage applied thereto across a surface area of the first reference plane, and a second electrically conductive reference plane extending parallel to the first reference plane, and configured to distribute a second reference voltage applied thereto across a surface area of the second reference plane. A first layer is provided, which extends between the first reference plane and the second reference plane, and includes one or more first signal lines extending adjacent the first reference plane. The first layer is divided into: (i) a first region in which the one or more first signal lines are disposed, (ii) a second region containing an additional plane that is configured to receive a third voltage and has smaller surface area relative to the surface areas of the first and second reference planes, and (iii) a third region containing a dielectric layer. A second layer is provided, which extends between the first reference plane and the second reference plane, and includes one or more second signal lines extending adjacent the second reference plane. The second signal lines have linewidths that vary as a function of whether they are vertically aligned with the first region, the second region, or the third region.

Multi-level printed circuit boards and memory modules including the same

A module board and a memory module are provided. The module board includes a first branch line for connecting a clock signal terminal disposed on at least one surface to a first branch point; a first signal line for connecting the first branch point to a first module clock signal terminal; a second signal line for connecting the first module clock signal terminal to the kmodule clock signal terminal and a first termination resistance terminal; a third signal line for connecting the first branch point to a (k+1)module clock signal terminal; and a fourth signal line for connecting the (k+1)module clock signal terminal to a 2kmodule clock signal terminal and the second termination resistance terminal, wherein a length of the third signal line is greater than a sum of a length of the first signal line and a length of the second signal line.

Module board and memory module including the same

A PCB includes a plurality of layers spaced apart in a vertical direction, a first detection pattern and a second detection pattern and pads connected to the first detection pattern and the second detection pattern. The first detection pattern and the second detection pattern are provided in a respective one of a first layer and a second layer adjacent to each other such that the first detection pattern and the second detection pattern are opposed to each other. The pads are provided in an outmost layer. Each of the first detection pattern and the second detection includes at least one main segment extending in at least one of first and second horizontal directions and a diagonal direction. A time domain reflectometry connected to a pair of pads detects a misalignment of the PCB by measuring differential characteristic impedance of the first detection pattern and the second detection pattern.

Printed circuit boards and memory modules

A memory module including: a first printed circuit board; a first socket and a second socket; and a daisy chain pattern formed in a first region of the first printed circuit board and connected to the first socket and the second socket, wherein an electrical signal on the daisy chain pattern is transferred to a host device when the first socket and the second socket are connected to the host device.

Memory module for protection of a circuit, a memory module protection device, and a memory module protection system

A printed circuit board (PCB) includes: an insulation substrate; a first pad on the insulation substrate; and a second pad on the insulation substrate and spaced apart from the first pad, wherein the second pad has a size substantially the same as a size of the first pad, wherein the first pad includes a first recess configured to receive a first electrode of a passive element, wherein the second pad includes a second recess receiving a second electrode of the passive element, wherein the first recess has a depth substantially the same as a thickness of the first pad, wherein the second recess has a depth substantially the same as a thickness of the second pad, wherein each of the first recess and the second recess exposes an upper surface of the insulation substrate.

Printed circuit board and semiconductor module including the same

A module board is provided. The module board includes a plurality of first left terminals and a plurality of first right terminals. Each of the plurality of first left terminals includes a left upper body, a left lower body, and a left lower bar which are connected to one another and sequentially provided, each of the plurality of first right terminals includes a right upper body, a right lower body, and a right lower bar which are connected to one another and sequentially provided, and a first width of each of the left upper body and the right upper body is greater than a second width of each of the left lower bar and the right lower bar.

Growing community of inventors

Seoul, South Korea

Hwanwook Park