Samsung Electronics Co., Ltd.

Hwaeon Shin

Sanghoon Lee

Joonsuk Lee

Sunggil Kim

Seulye Kim

Hyeeun Hong

Disclosed are three-dimensional semiconductor memory devices and methods of fabricating the same. The method comprises sequentially forming a sacrificial pattern and a source conductive layer on a substrate, forming a mold structure including a plurality of insulating layers and a plurality of sacrificial layers on the source conductive layer; forming a plurality of vertical structures penetrating the mold structure, forming a trench penetrating the mold structure, forming a sacrificial spacer on a sidewall of the trench, removing the sacrificial pattern to form a horizontal recess region; removing the sacrificial spacer, and forming a source conductive pattern filling the horizontal recess region.

Three-dimensional semiconductor memory devices and methods of fabricating the same

Disclosed are three-dimensional semiconductor memory devices and methods of fabricating the same. The method includes sequentially forming a sacrificial pattern and a source conductive layer on a substrate, forming a mold structure including a plurality of insulating layers and a plurality of sacrificial layers on the source conductive layer; forming a plurality of vertical structures that penetrate the mold structure, forming a trench that penetrates the mold structure, forming a sacrificial spacer on a sidewall of the trench, removing the sacrificial pattern to form a horizontal recess region; removing the sacrificial spacer, and forming a source conductive pattern that fills the horizontal recess region.

Growing community of inventors

Suwon-si, South Korea

Hwaeon Shin